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HOPA2348AIDR

Public Made by Adom

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HXY MOSFET Operational Amplifier, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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Datasheet

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Contents

README

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HOPA2348AIDR

HXY MOSFET · Operational Amplifier · SOP-8

HOPA2348AIDR from HXY MOSFET, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Amplifier A output, rail-to-rail output swing into heavy loads.
2 -INA input Amplifier A inverting input; voltage range can go from (VS- − 0.2V) to (VS+ + 0.2V).
3 +INA input Amplifier A non-inverting input; has the same voltage range as -IN, (VS- − 0.2V) to (VS+ + 0.2V).
4 -VS power_in Negative supply, normally tied to ground; the voltage between VS+ and VS- must be 2.1V to 5.5V, and if not grounded it should be bypassed with 0.1μF close to the part.
5 +INB input Amplifier B non-inverting input; has the same voltage range as -IN, (VS- − 0.2V) to (VS+ + 0.2V).
6 -INB input Amplifier B inverting input; voltage range can go from (VS- − 0.2V) to (VS+ + 0.2V).
7 OUTB output Amplifier B output, rail-to-rail output swing into heavy loads.
8 +VS power_in Positive supply, 2.1V to 5.5V (VS+ to VS- must be 2.1V to 5.5V, split supplies possible), bypass with 0.1μF close to the part.

Key specifications

Parameter Value
Manufacturer HXY MOSFET
Package SOP-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VOS -2.5 0.5 2.5 mV 3
Input offset voltage over temperature VOS -2.8 2.8 mV over Temperature 3
Offset voltage drift VOSTC 2 μV/℃ over Temperature 3
Input bias current IB 1 pA 3
Input bias current over temperature IB 800 pA over Temperature 3
Input offset current IOS 1 pA 3
Common-mode rejection ratio CMRR 80 97 dB VCM= 0.05V to 3.5V 3
Common-mode rejection ratio over temperature CMRR 70 dB VCM= 0.05V to 3.5V, over Temperature 3
Common-mode rejection ratio CMRR 70 82 dB VCM= VS--0.1 to VS++0.1 V 3
Common-mode rejection ratio over temperature CMRR 66 dB VCM= VS--0.1 to VS++0.1 V, over Temperature 3
Open-loop voltage gain AVOL 102 116 dB RL = 10kΩ, VO = 0.05 to 3.5 V 3
Open-loop voltage gain over temperature AVOL 90 dB RL = 10kΩ, VO = 0.05 to 3.5 V, over Temperature 3
Open-loop voltage gain AVOL 93 108 dB RL = 2kΩ, VO = 0.15 to 3.5 V 3
Open-loop voltage gain over temperature AVOL 82 dB RL = 2kΩ, VO = 0.15 to 3.5 V, over Temperature 3
Input resistance RIN 100 GΩ 3
Input capacitance differential CIN 2 pF Differential 3
Input capacitance common mode CIN 3.5 pF Common mode 3
Closed-loop output impedance ZOUT 0.4 Ω f = 200kHz, G = +1 3
Open-loop output impedance ZOUT 2.6 Ω f = 1MHz, IO= 0 3
Short-circuit current source ISC 45 mA Source current through 10Ω 3
Short-circuit current sink ISC 45 mA Sink current through 10Ω 3
Gain bandwidth product GBW 1.3 MHz f = 1kHz 3
Phase margin ΦM 66 ° CL = 100pF 3
Slew rate SR 0.9 V/μs G=+1,CL=100pF,VO=1.5V to 3.5V 3
Settling time to 0.1% tS 4.1 μs To 0.1%, G = +1, 2V step 3
Settling time to 0.01% tS 5.1 μs To 0.01%, G = +1, 2V step 3
Total harmonic distortion + noise THD+N 0.0018 % f = 1kHz, G = +1, VO = 3VPP 3
Input voltage noise Vn 8 μVP-P f = 0.1 to 10 Hz 4
Input voltage noise density en 27 nV/√Hz f = 1kHz 4
Input current noise density In 4 fA/√Hz f = 1kHz 4
Operating supply voltage VS 2.1 5.5 V 4
Power supply rejection ratio PSRR 82 102 dB VS= 2.7V to 5.5V, VCM< VS+− 2V 4
Power supply rejection ratio over temperature PSRR 75 dB over Temperature 4
Quiescent current (per amplifier) IQ 70 110 μA 4
Quiescent current over temperature IQ 125 μA over Temperature 4
Operating temperature range TA -40 125 °C 4
Package thermal resistance SOP-8 θJA 125 ℃/W SOP-8 4
Supply voltage VS+ to VS- 10 V 2
Storage temperature range -65 150 ℃ 2
Junction temperature 160 ℃ 2
Lead temperature 260 ℃ Soldering 10 sec 2
ESD voltage HBM -4000 4000 V HBM 2
ESD voltage CDM -2000 2000 V CDM 2
ESD voltage MM -400 400 V MM 2

CAD (KiCad official)

  • Symbol: HOPA2348AIDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: hopa2348aidr-etched.step / hopa2348aidr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hopa2348aidr.step / hopa2348aidr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HXY MOSFET datasheet (13 pp, sha256 4d580fa917d21ea0, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF