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Contents

README

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MCP1700-3302E

Microchip Tech · Linear Voltage Regulators (LDO) · TO-92-3

MCP1700-3302E from Microchip Tech, in a TO-92-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Regulator ground; the LDO bias current (1.6 µA typical) flows out of this pin with no high current, and output regulation is referenced to it.
2 VIN power_in Unregulated input supply, specified from 2.3V to 6.0V, and requires low source impedance for stable LDO operation.
3 VOUT power_out Regulated output voltage; the current flowing out of this pin equals the DC load current, and the output capacitor should be placed as close to this pin as practical.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TO-92-3
Category Power Management ICs
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Operating Voltage VIN 2.3 6 V Note 1 3
Input Quiescent Current Iq 1.6 4 µA IL = 0 mA, VIN =VR + 1V 3
Maximum Output Current IOUT_mA 250 mA For VR 2.5V 3
Output Voltage Regulation (offset from VR, 2.0%) VOUT -2 2 % Note 2; printed as VR - 2.0% min and VR + 2.0% max 3
Output Voltage Regulation (offset from VR, 3.0%) VOUT -3 3 % Note 2; printed as VR - 3.0% min and VR + 3.0% max; boldface for TJ -40°C to +125°C 3
Line Regulation VOUT/(VOUT x VIN) -1 0.75 1 %/V (VR + 1)V VIN 6V 3
Load Regulation VOUT/VOUT -1.5 1 1.5 % IL = 0.1 mA to 250 mA for VR 2.5V 3
Dropout Voltage (VR 2.5V) VIN-VOUT 178 350 mV IL = 250 mA, (Note 1, Note 5) 3
Specified Temperature Range TA -40 125 °C 4
Operating Temperature Range TJ -40 125 °C 4
Storage Temperature Range TA -65 150 °C 4
Maximum Junction Temperature TJ 150 °C 3
Supply Voltage VDD VDD 6.5 V 3
ESD protection HBM 4 kV All pins, HBM 3
ESD protection MM 400 V All pins, MM 3
Thermal Resistance, TO-92 Junction to Ambient JA 92 °C/W EIA/JEDEC JESD51-7, FR-4 4-Layer Board 5
Thermal Resistance, TO-92 Junction to Case (Top) JC(Top) 74 °C/W FR-4 4-Layer Board 5

CAD (KiCad official)

  • Symbol: MCP1700-3302E
  • Footprint: Package_TO_SOT_THT:TO-92_Inline
  • 3D model: TO-92-3 (KiCad packages3D, STEP)
  • 3D model files: mcp1700-3302e-etched.step / mcp1700-3302e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp1700-3302e.step / mcp1700-3302e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (32 pp, sha256 44919ee695b5d6ef, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF