AMC1210IRHAR from Texas Instruments, in a VQFN-40(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CVDD	power_in	Modulator side supply (pins 1 to 9 are the modulator side); 3.0 V to 5.5 V with CVDD ≥ DVDD ≥ BVDD.
2	IN1	input	Data input from Modulator 1.
3	CLK1	bidirectional	Clock from/to Modulator 1; modulator clock frequency up to 22 MHz in Mode 0.
4	IN2	input	Data input from Modulator 2.
5	CLK2	bidirectional	Clock from/to Modulator 2.
6	IN3	input	Data input from Modulator 3.
7	CLK3	bidirectional	Clock from/to Modulator 3.
8	IN4	input	Data input from Modulator 4.
9	CLK4	bidirectional	Clock from/to Modulator 4.
10	AVDD	power_in	Signal generator supply; 4.5 V to 5.5 V.
11	PWM1	output	Signal generator output.
12	PWM2	output	Signal generator output (inverted).
13	AGND	power_in	Signal generator ground.
14	DVDD	power_in	Core supply; 3.0 V to 5.5 V with CVDD ≥ DVDD ≥ BVDD.
15	GND	power_in	Ground.
16	CLK	input	System clock, up to 90 MHz; connect to GND if none of its timing features are needed to avoid increased current consumption.
17	SH1	input	First asynchronous sample-and-hold input.
18	SH2	input	Second asynchronous sample-and-hold input.
19	ACK	output	Acknowledge signal output.
20	INT	output	Interrupt signal output.
21	AD7	bidirectional	Data bus bit 7 (most significant bit).
22	AD6	bidirectional	Data bus bit 6.
23	AD5	bidirectional	Data bus bit 5.
24	AD4	bidirectional	Data bus bit 4.
25	AD3	bidirectional	Data bus bit 3.
26	AD2	bidirectional	Data bus bit 2.
27	AD1	bidirectional	Data bus bit 1.
28	AD0	bidirectional	Data bus bit 0 (LSB); functions as SPI data out in SPI mode.
29	GND	power_in	Ground.
30	BVDD	power_in	Controller side supply (pins 16 to 38); 2.4 V to 5.5 V with CVDD ≥ DVDD ≥ BVDD.
31	WR	input	Write signal; SPI clock in SPI mode, up to 25 MHz (option 1) or 40 MHz (option 2).
32	RD	input	Read signal; SPI data in in SPI mode.
33	CS	input	Chip select signal; frame sync in SPI mode.
34	ALE	input	Address latch enable; function depends on interface mode.
35	M0	input	First mode pin; with M1 selects SPI or parallel mode 1/2/3.
36	M1	input	Second mode pin; with M0 selects SPI or parallel mode 1/2/3.
37	RST	input	Active-low asynchronous reset.
38	TE	input	For factory test only; must be tied to ground.
39	DVDD	power_in	Core supply; 3.0 V to 5.5 V with CVDD ≥ DVDD ≥ BVDD.
40	GND	power_in	Ground.
41	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-40(6x6)
Category	Data Acquisition
Pins	41

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Output high voltage (digital)	VOH	2.4			V	BVDD = 2.7	3
Output high voltage (digital)	VOH	4.44			V	BVDD = 5.0	3
Output low voltage (digital)	VOL			0.4	V	BVDD = 2.7	3
Output low voltage (digital)	VOL			0.5	V	BVDD = 5.0	3
High-level input voltage	VIH	0.7			V	min is 0.7BVDD as printed (value in units of BVDD)	3
Low-level input voltage	VIL			0.3	V	max is 0.3BVDD as printed (value in units of BVDD)	3
System clock frequency				90	MHz	Pin CLK	3
Modulator clock frequency				22	MHz	Pins CLK1, CLK2, CLK3, CLK4; Mode = 0	3
SPI interface clock frequency option 1				25	MHz	Pin WR, option 1	3
SPI interface clock frequency option 2				40	MHz	Pin WR, option 2	3
Parallel interface read/write frequency				22	MHz	Pin CS	3
Power-supply voltage, pin AVDD	AVDD	4.5		5.5	V		3
Power-supply voltage, pins CVDD and DVDD	CVDD, DVDD	3		5.5	V	CVDD ≥ DVDD ≥ BVDD	3
Power-supply voltage, pin BVDD	BVDD	2.4		5.5	V	CVDD ≥ DVDD ≥ BVDD	3
Signal generator output high voltage	VOH	4.6	4.73		V	RLOAD = 50Ω, bit HPE = 1	3
Signal generator output low voltage	VOL		0.26	0.4	V	RLOAD = 50Ω, bit HPE = 1	3
Supply voltage, all supplies to GND	AVDD, BVDD, CVDD, DVDD	-0.3		6	V		2
Digital input to GND		-0.3			V	GND, 0.3 to BVDD + 0.3 V	2
Ground voltage difference, AGND to GND		-0.3		0.3	V		2
Input current to any pin except supply pins		-10		10	mA		2
Operating virtual junction temperature range	TJ	-40		150	°C		2
Operating free-air temperature range	TA	-40		125	°C		2
Storage temperature range	TSTG	-65		150	°C		2
Specified temperature range		-40		125	°C		2
Thermal resistance, junction-to-ambient	RθJA		32		°C/W	RHA package	2
Package power rating			3787		mW	TA ≤ +25°C, RHA; derating 30.3 mW/°C above 25°C	2
Mode 0 clock period CLKx	tw1	45			ns	max is 1/64th of CLK period	6
Mode 0 clock high time CLKx	tw2	10			ns	max is tw1, 10	6
Setup time from data valid to CLKx high	tsu1	5			ns		6
Hold time from CLKx high to data invalid	th1	5			ns		6
Mode 1 clock period CLKx	tw3	90			ns	max is 1/128th of CLK period	6
Mode 1 clock high time CLKx	tw4	20			ns	max is tw3, 10	6
Mode 2 data width INx	tw5	45			ns		6
Mode 2 data pulse width INx	tw6	22			ns		6
Mode 3 clock period CLKx	tw7	22			ns	max is 1/32nd of CLK period	6
Delay from system clock CLK high to generated CLKx high	td1	0		3	ns		6
Total power			24.5		mW	All supplies = 5V; two filter modules, both Sinc3, SOSR = 256	3
Power-supply current, four filter modules			850		µA/MHz	Four filter modules	3
Power-supply current, one filter module			260		µA/MHz	One filter module	3

CAD (KiCad official)

Symbol: AMC1210IRHAR
Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
3D model: VQFN-40(6x6) (KiCad packages3D, STEP)
3D model files: amc1210irhar-etched.step / amc1210irhar-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); amc1210irhar.step / amc1210irhar.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (54 pp, sha256 10554a5795a777f2, retrieved 2026-10-31, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AMC1210IRHAR

Verified AMC1210IRHAR

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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