component
SN74LV4046ADR
Public Made by Adomby adom
Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LV4046ADR
Texas Instruments · Clock Generators, PLLs, Frequency Synthesizers · SOIC-16
SN74LV4046ADR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PCPOUT | output | Phase comparator pulse output |
| 2 | PC1OUT | output | Phase comparator 1 output from exclusive OR phase detector |
| 3 | COMPIN | input | Comparator input for phase comparison |
| 4 | VCOOUT | output | VCO oscillator output with 50% duty cycle |
| 5 | INH | input | Inhibit input; LOW enables VCO and demodulator, HIGH disables for standby power reduction |
| 6 | C1A | passive | Capacitor C1 connection A for VCO timing; requires external capacitor ≥40 pF between C1A and C1B |
| 7 | C1B | passive | Capacitor C1 connection B for VCO timing; requires external capacitor ≥40 pF between C1A and C1B |
| 8 | GND | power_in | Ground (0 V) |
| 9 | VCOIN | input | VCO input for phase error signal from lowpass filter; operating voltage range 1.1 V to 3.2 V at 4.5 V to 5.5 V supply |
| 10 | DEMOUT | output | Demodulator output equal to VCO input voltage; connect load resistor RS (50 kΩ to 300 kΩ) to GND if used |
| 11 | R1 | passive | Resistor R1 connection for VCO frequency tuning; connect 3 kΩ to 50 kΩ resistor to GND |
| 12 | R2 | passive | Resistor R2 connection for VCO frequency offset; connect 3 kΩ to 50 kΩ resistor to GND, parallel combination with R1 must exceed 2.7 kΩ |
| 13 | PC2OUT | tri_state | Phase comparator 2 output from edge-triggered flip-flop detector with 3-state output control |
| 14 | SIGIN | input | Signal input for phase comparison; supports direct or AC-coupled (series capacitor) signal inputs |
| 15 | PC3OUT | output | Phase comparator 3 output from edge-triggered RS flip-flop phase detector |
| 16 | VCC | power_in | Positive supply voltage; recommended operating range 3 V to 5.5 V |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Clock/Timing |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN74LV4046ADR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
sn74lv4046adr-etched.step/sn74lv4046adr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv4046adr.step/sn74lv4046adr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
59629b0484cc44bb, retrieved 2026-09-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).