component
BQ76PL102RGTR
Public Made by Adomby adom
Texas Instruments Battery Management, VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownBQ76PL102RGTR
Texas Instruments · Battery Management · VQFN-16-EP(3x3)
BQ76PL102RGTR from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Connect to the most-negative cell voltage (cell 1 negative) of the series string. |
| 2 | VLDO | power_out | Low-dropout regulator output that must be connected to VPP and bypassed with a 4.7 µF capacitor. |
| 3 | TDI | unconnected | Do not connect. |
| 4 | SDI | input | PowerLAN serial data input from the lower (south, downstream) part, capacitively coupled, with rise and fall times limited to 500 ns. |
| 5 | PUMP1S | output | Charge-balance gate drive for cell 1 south, switching the cell-balancing MOSFET that pumps charge to the next lower cell. |
| 6 | PUMP1N | output | Charge-balance gate drive for cell 1 north, switching the cell-balancing MOSFET that pumps charge from cell 1 to cell 2. |
| 7 | PUMP2S | output | Charge-balance gate drive for cell 2 south, switching the cell-balancing MOSFET that pumps charge from cell 2 to cell 1. |
| 8 | PUMP2N | output | Charge-balance gate drive for cell 2 north, switching the cell-balancing MOSFET that pumps charge to the next higher cell. |
| 9 | SDO | output | PowerLAN serial data output to the north (upstream) part, capacitively coupled with output logic high of 0.9 VLDO minimum. |
| 10 | TCK | unconnected | Do not connect. |
| 11 | TMD | unconnected | Do not connect. |
| 12 | V2 | power_in | Connect to the most-positive cell voltage (cell 2 positive); also an analog input for cell 2 voltage measurement, and to V1 of the topmost device when the stack has an odd number of cells. |
| 13 | XT2 | input | External temperature sensor 2 analog input, using a calibrated 50 µA sensor current. |
| 14 | XT1 | input | External temperature sensor 1 analog input, using a calibrated 50 µA sensor current. |
| 15 | V1 | input | Midpoint cell connection (cell 1 positive and cell 2 negative) used as an analog input for cell voltage measurement. |
| 16 | VPP | power_in | Connect to VLDO, the low-dropout regulator output. |
| 17 | Thermal pad | power_in | Exposed thermal pad that must be connected to VSS and soldered to the PCB for thermal and mechanical performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-16-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
BQ76PL102RGTR - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
bq76pl102rgtr-etched.step/bq76pl102rgtr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq76pl102rgtr.step/bq76pl102rgtr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
fe8ff75e3d430c51, retrieved 2026-10-07, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).