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SN74LS51DR
Public Made by Adomby adom
Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LS51DR
Texas Instruments · Logic Gates · SOIC-14
SN74LS51DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 input A, part of the first AND term (1A·1B·1C) of the 3-input AND-OR-invert gate. |
| 2 | 2A | input | Gate 2 input A, part of the first AND term (2A·2B) of the 2-input AND-OR-invert gate. |
| 3 | 2B | input | Gate 2 input B, part of the first AND term (2A·2B) of the 2-input AND-OR-invert gate. |
| 4 | 2C | input | Gate 2 input C, part of the second AND term (2C·2D) of the 2-input AND-OR-invert gate. |
| 5 | 2D | input | Gate 2 input D, part of the second AND term (2C·2D) of the 2-input AND-OR-invert gate. |
| 6 | 2Y | output | Gate 2 output, 2Y = NOT[(2A·2B)+(2C·2D)]. |
| 7 | GND | power_in | Ground. |
| 8 | 1Y | output | Gate 1 output, 1Y = NOT[(1A·1B·1C)+(1D·1E·1F)]. |
| 9 | 1D | input | Gate 1 input D, part of the second AND term (1D·1E·1F) of the 3-input AND-OR-invert gate. |
| 10 | 1E | input | Gate 1 input E, part of the second AND term (1D·1E·1F) of the 3-input AND-OR-invert gate. |
| 11 | 1F | input | Gate 1 input F, part of the second AND term (1D·1E·1F) of the 3-input AND-OR-invert gate. |
| 12 | 1B | input | Gate 1 input B, part of the first AND term (1A·1B·1C) of the 3-input AND-OR-invert gate. |
| 13 | 1C | input | Gate 1 input C, part of the first AND term (1A·1B·1C) of the 3-input AND-OR-invert gate. |
| 14 | VCC | power_in | Supply voltage. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74LS51DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ls51dr-etched.step/sn74ls51dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ls51dr.step/sn74ls51dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
8dae26aa17b15caa, retrieved 2026-10-07, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).