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MCP45HV31-103E

Microchip Tech · Digital Potentiometers · TSSOP-14

MCP45HV31-103E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VL power_in Positive digital power supply input relative to DGND, ranging from 1.8V to 5.5V, with a decoupling capacitor to DGND recommended.
2 SCL input I2C serial clock input (Schmitt trigger), input-only because the device is an I2C slave.
3 A1 input I2C address bit 1 input (Schmitt trigger); with A0 allows up to four devices on one I2C bus.
4 SDA bidirectional I2C serial data input/output (Schmitt trigger) with an open-drain N-channel driver, used to read and write the Wiper and TCON registers.
5 A0 input I2C address bit 0 input (Schmitt trigger), latched at POR/BOR.
6 WLAT input Wiper latch enable input: 0 transfers the received I2C shift-register value to the Wiper register, 1 holds the received value in the shift register buffer.
7 NC unconnected Not internally connected to the die; connect to DGND or VL to reduce noise coupling.
8 SHDN input Shutdown input (Schmitt trigger) that forces the resistor network terminals into the hardware shutdown state.
9 DGND power_in Digital ground reference.
10 V- power_in Analog negative potential supply, which must be lower than or equal to the DGND potential.
11 P0B passive Potentiometer 0 Terminal B, the fixed connection to zero-scale wiper value (0x00), with no polarity and voltage between V+ and V-.
12 P0W passive Potentiometer 0 wiper terminal, with no polarity relative to A or B and voltage between V+ and V-.
13 P0A passive Potentiometer 0 Terminal A, the fixed connection to full-scale wiper value (0x7F for 7-bit), with no polarity and voltage between V+ and V-.
14 V+ power_in Analog positive supply voltage, which must be at a higher potential than V-, maximum +36V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TSSOP-14
Category ADC/DAC/Data Conversion
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Resistance RAB (-103) RAB 8 10 12 kΩ -103 devices, V+/V- = 10V to 36V 5
Digital supply VL VL 2.7 5.5 V With respect to DGND 4
Digital supply VL (low) VL 1.8 5.5 V VL ≥ V- + 2.7V 4
Analog supply V+ V+ 36 V With respect to V- 4
Resistor network supply voltage VRN 36 V Delta voltage between V+ and V- 4
Supply current serial interface active IDDD 45 650 µA Serial Interface Active, VL = 5.5V, FSCL = 3.4 MHz, V- = DGND 5
Supply current serial interface inactive IDDD 4 7 µA Serial Interface Inactive, VL = 5.5V, SCL = VIH, Wiper = 0, V- = DGND 5
Analog supply current IDDA 5 µA Current V+ to V-, PxA = PxB = PxW, DGND = V- +(V+/2) 5
RAB current IAB 4.5 mA -103 devices, V- = -18V, V+ = +18V 5
Wiper resistance RW 75 170 Ω IW = 1 mA, V+ = +18V, V- = -18V, code = 00h 6
Wiper resistance RW 145 200 Ω IW = 1 mA, V+ = +5.0V, V- = -5.0V, code = 00h 6
Terminal current IT, IW 12.5 mA -103 devices IBW(W ≠ ZS) and IAW(W ≠ FS) 6
Terminal current at ZS/FS IT, IW 36 mA IBW(W = ZS), or IAW(W = FS) 6
Full scale error 10k 7-bit VWFSE -3.5 LSb 10 k 7-bit VAB = 10V to 36V 7
Zero scale error 10k 7-bit VAB 20-36V VWZSE 2.125 LSb 10 k 7-bit VAB = 20V to 36V 8
Zero scale error 10k 7-bit VAB 10-36V VWZSE 3.25 LSb 10 k 7-bit VAB = 10V to 36V 8
Potentiometer INL 10k 7-bit P-INL -0.5 0.25 0.5 LSb 10 k 7-bit VAB = 10V to 36V 9
Potentiometer DNL 10k 7-bit P-DNL -0.25 0.1 0.25 LSb 10 k 7-bit VAB = 10V to 36V 9
Rheostat INL 10k 7-bit 36V R-INL -0.6 0.6 LSb 10 k 7-bit IW = 3.0 mA, (V+ - V-) = 36V (Note 2) 11
Rheostat INL 10k 7-bit 20V R-INL -0.8 0.8 LSb 10 k 7-bit IW = 1.7 mA, (V+ - V-) = 20V (Note 2) 11
Rheostat INL 10k 7-bit 10V R-INL -1.1 1.1 LSb 10 k 7-bit IW = 830 µA, (V+ - V-) = 10V 11
Rheostat DNL 10k 7-bit 36V R-DNL -0.25 0.25 LSb 10 k 7-bit IW = 3.0 mA, (V+ - V-) = 36V (Note 2) 12
Rheostat DNL 10k 7-bit 20V R-DNL -0.25 0.25 LSb 10 k 7-bit IW = 1.7 mA, (V+ - V-) = 20V (Note 2) 12
Rheostat DNL 10k 7-bit 10V R-DNL -0.25 0.25 LSb 10 k 7-bit IW = 830 µA, (V+ - V-) = 10V 12
Power supply sensitivity 7-bit PSS 0.0015 0.0035 %/% 7-bit VL = 2.7V to 5.5V, V+ = 18V, V- = -18V, Code = 3Fh 14
Input leakage current IIL -1 1 uA VIN = VL and VIN = DGND 13
Schmitt trigger high-input threshold VIH 0.7 V 1.8V ≤ VL ≤ 5.5V; min 0.7 VL 13
Output low voltage SDA VOL 0.2 V VL = 5.5V, IOL = 5 mA; max 0.2 VL 13
Nominal resistance tempco ΔRAB/ΔT 50 ppm/°C TA = -40°C to +85°C 6
Nominal resistance tempco ΔRAB/ΔT 100 ppm/°C TA = -40°C to +125°C 6
Ratiometric tempco ΔVBW/ΔT 15 ppm/°C Code = Mid scale (3Fh) 6
Bandwidth -3 dB 10k 7-bit BW 240 kHz 10 k 7-bit Code = 3Fh, load = 30 pF 10
Settling time 10k tS 1 µs Code = 00h -> 7Fh; 7Fh -> 00h, CL = 50 pF 16
Power dissipation 10k PDISS 130 mW VL = 5.5V, V+ = 18V, V- = -18V 14
Leakage current into A, W or B ITL 5 nA A = W = B = V- 6
Capacitance PA CA 75 pF Measured to V-, f =1 MHz, Wiper code = Mid Scale 13
Capacitance PW CW 120 pF Measured to V-, f =1 MHz, Wiper code = Mid Scale 13
Capacitance PB CB 75 pF Measured to V-, f =1 MHz, Wiper code = Mid Scale 13
Operating temperature TA -40 125 °C 21
Thermal resistance TSSOP-14 θJA 100 °C/W 14L-TSSOP (ST) 21
V+ with respect to DGND -0.3 40 V DGND - 0.3V to 40.0V 3
VL with respect to DGND -0.6 7 V 3
Digital pins with respect to DGND -0.6 V SCL, SDA, A0, A1, WLAT, SHDN: -0.6V to VL + 0.6V 3
Continuous current into PxA/PxW/PxB -12.5 12.5 mA RAB = 10 kΩ 3
Package power dissipation TSSOP-14 1000 mW TA = +50°C, TJ = +150°C 3
Maximum junction temperature TJ 150 °C 3
Storage temperature -65 150 °C 3
ESD HBM 5 kV Human Body Model, all pins 3

CAD (KiCad official)

  • Symbol: MCP45HV31-103E
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: mcp45hv31-103e-etched.step / mcp45hv31-103e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp45hv31-103e.step / mcp45hv31-103e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (100 pp, sha256 ab854db7c83242c1, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF