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Contents

README

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MC74HC259ADR2G

onsemi · Latches · SOIC-16

MC74HC259ADR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Address input bit 0 (LSB) that selects which of the eight latches is addressed (Q0 when A2 A1 A0 = LLL).
2 A1 input Address input bit 1 that selects the addressed latch; changing more than one address bit should only be done in memory mode.
3 A2 input Address input bit 2 (MSB) that selects the addressed latch (Q4-Q7 when high).
4 Q0 output Noninverting latch output 0, addressed when A2 A1 A0 = LLL, with drive capability of 10 LSTTL loads.
5 Q1 output Noninverting latch output 1, addressed when A2 A1 A0 = LLH.
6 Q2 output Noninverting latch output 2, addressed when A2 A1 A0 = LHL.
7 Q3 output Noninverting latch output 3, addressed when A2 A1 A0 = LHH.
8 GND power_in Ground reference (0 V) for the supply and all input and output voltages.
9 Q4 output Noninverting latch output 4, addressed when A2 A1 A0 = HLL.
10 Q5 output Noninverting latch output 5, addressed when A2 A1 A0 = HLH.
11 Q6 output Noninverting latch output 6, addressed when A2 A1 A0 = HHL.
12 Q7 output Noninverting latch output 7, addressed when A2 A1 A0 = HHH.
13 DATA IN input Data input written into the addressed latch in addressable latch mode, or followed by the addressed output in demultiplexer mode.
14 ENABLE input Enable input; low selects addressable latch mode (Reset high) or 8-line demultiplexer mode (Reset low), high selects memory mode (Reset high) or reset (Reset low).
15 RESET input Active-low reset input that drives all outputs LOW regardless of address and data inputs when Enable is high.
16 VCC power_in Positive supply pin with a recommended operating range of 2.0 to 6.0 V (absolute maximum -0.5 to +7.0 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-16
Category Logic ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage VCC -0.5 7 V Referenced to GND 2
DC Input Current, per Pin Iin -20 20 mA 2
DC Output Current, per Pin Iout -25 25 mA 2
DC Supply Current, VCC and GND Pins ICC -50 50 mA 2
Power Dissipation in Still Air, SOIC Package PD 500 mW SOIC Package 2
Storage Temperature Tstg -65 150 °C 2
DC Supply Voltage VCC 2 6 V Referenced to GND 2
DC Input/Output Voltage Vin, Vout 0 6 V 0 to VCC 2
Operating Temperature TA -55 125 °C All Package Types 2
Input Rise and Fall Time tr, tf 0 1000 ns VCC = 2.0 V 2
Input Rise and Fall Time tr, tf 0 600 ns VCC = 3.0 V 2
Input Rise and Fall Time tr, tf 0 500 ns VCC = 4.5 V 2
Input Rise and Fall Time tr, tf 0 400 ns VCC = 6.0 V 2
Minimum High-Level Input Voltage VIH 1.5 V VCC=2.0 V; Vout=0.1 V or VCC-0.1 V; /Iout/≤20 µA; -55 to 125°C 3
Minimum High-Level Input Voltage VIH 2.1 V VCC=3.0 V; Vout=0.1 V or VCC-0.1 V; /Iout/≤20 µA; -55 to 125°C 3
Minimum High-Level Input Voltage VIH 3.15 V VCC=4.5 V; Vout=0.1 V or VCC-0.1 V; /Iout/≤20 µA; -55 to 125°C 3
Minimum High-Level Input Voltage VIH 4.2 V VCC=6.0 V; Vout=0.1 V or VCC-0.1 V; /Iout/≤20 µA; -55 to 125°C 3
Maximum Low-Level Input Voltage VIL 0.5 V VCC=2.0 V; Vout=0.1 V or VCC-0.1 V; /Iout/≤20 µA; -55 to 125°C 3
Maximum Low-Level Input Voltage VIL 0.9 V VCC=3.0 V; Vout=0.1 V or VCC-0.1 V; /Iout/≤20 µA; -55 to 125°C 3
Maximum Low-Level Input Voltage VIL 1.35 V VCC=4.5 V; Vout=0.1 V or VCC-0.1 V; /Iout/≤20 µA; -55 to 125°C 3
Maximum Low-Level Input Voltage VIL 1.8 V VCC=6.0 V; Vout=0.1 V or VCC-0.1 V; /Iout/≤20 µA; -55 to 125°C 3
Minimum High-Level Output Voltage VOH 1.9 V VCC=2.0 V; Vin=VIH or VIL; /Iout/≤20 µA; -55 to 125°C 3
Minimum High-Level Output Voltage VOH 4.4 V VCC=4.5 V; Vin=VIH or VIL; /Iout/≤20 µA; -55 to 125°C 3
Minimum High-Level Output Voltage VOH 5.9 V VCC=6.0 V; Vin=VIH or VIL; /Iout/≤20 µA; -55 to 125°C 3
Minimum High-Level Output Voltage VOH 2.48 V VCC=3.0 V; Vin=VIH or VIL; /Iout/≤2.4 mA; -55 to 25°C 3
Minimum High-Level Output Voltage VOH 2.34 V VCC=3.0 V; Vin=VIH or VIL; /Iout/≤2.4 mA; ≤85°C 3
Minimum High-Level Output Voltage VOH 2.2 V VCC=3.0 V; Vin=VIH or VIL; /Iout/≤2.4 mA; ≤125°C 3
Minimum High-Level Output Voltage VOH 3.98 V VCC=4.5 V; Vin=VIH or VIL; /Iout/≤4.0 mA; -55 to 25°C 3
Minimum High-Level Output Voltage VOH 3.84 V VCC=4.5 V; Vin=VIH or VIL; /Iout/≤4.0 mA; ≤85°C 3
Minimum High-Level Output Voltage VOH 3.7 V VCC=4.5 V; Vin=VIH or VIL; /Iout/≤4.0 mA; ≤125°C 3
Minimum High-Level Output Voltage VOH 5.48 V VCC=6.0 V; Vin=VIH or VIL; /Iout/≤5.2 mA; -55 to 25°C 3
Minimum High-Level Output Voltage VOH 5.34 V VCC=6.0 V; Vin=VIH or VIL; /Iout/≤5.2 mA; ≤85°C 3
Minimum High-Level Output Voltage VOH 5.2 V VCC=6.0 V; Vin=VIH or VIL; /Iout/≤5.2 mA; ≤125°C 3
Maximum Low-Level Output Voltage VOL 0.1 V VCC=2.0/4.5/6.0 V; Vin=VIH or VIL; /Iout/≤20 µA; all temperatures 3
Maximum Low-Level Output Voltage VOL 0.26 V VCC=3.0/4.5/6.0 V; Vin=VIH or VIL; /Iout/≤2.4/4.0/5.2 mA; -55 to 25°C 3
Maximum Low-Level Output Voltage VOL 0.33 V VCC=3.0/4.5/6.0 V; Vin=VIH or VIL; /Iout/≤2.4/4.0/5.2 mA; ≤85°C 3
Maximum Low-Level Output Voltage VOL 0.4 V VCC=3.0/4.5/6.0 V; Vin=VIH or VIL; /Iout/≤2.4/4.0/5.2 mA; ≤125°C 3
Maximum Input Leakage Current Iin -0.1 0.1 µA VCC=6.0 V; Vin=VCC or GND; -55 to 25°C 3
Maximum Input Leakage Current Iin -1 1 µA VCC=6.0 V; Vin=VCC or GND; ≤85°C and ≤125°C 3
Maximum Quiescent Supply Current (per Package) ICC 4 µA VCC=6.0 V; Vin=VCC or GND; Iout=0 µA; -55 to 25°C 3
Maximum Quiescent Supply Current (per Package) ICC 40 µA VCC=6.0 V; Vin=VCC or GND; Iout=0 µA; ≤85°C 3
Maximum Quiescent Supply Current (per Package) ICC 160 µA VCC=6.0 V; Vin=VCC or GND; Iout=0 µA; ≤125°C 3
Maximum Propagation Delay, Data to Output tPLH, tPHL 125 ns VCC=2.0 V; CL=50 pF; -55 to 25°C 4
Maximum Propagation Delay, Data to Output tPLH, tPHL 25 ns VCC=6.0 V; CL=50 pF; -55 to 25°C 4
Maximum Propagation Delay, Data to Output tPLH, tPHL 175 ns VCC=2.0 V; CL=50 pF; ≤125°C 4
Maximum Propagation Delay, Address Select to Output tPLH, tPHL 150 ns VCC=2.0 V; CL=50 pF; -55 to 25°C 4
Maximum Propagation Delay, Enable to Output tPLH, tPHL 150 ns VCC=2.0 V; CL=50 pF; -55 to 25°C 4
Maximum Propagation Delay, Reset to Output tPHL 110 ns VCC=2.0 V; CL=50 pF; -55 to 25°C 4
Maximum Output Transition Time, Any Output tTLH, tTHL 75 ns VCC=2.0 V; CL=50 pF; -55 to 25°C 4
Maximum Output Transition Time, Any Output tTLH, tTHL 13 ns VCC=6.0 V; CL=50 pF; -55 to 25°C 4
Maximum Input Capacitance Cin 10 pF 4
Power Dissipation Capacitance (Per Package) CPD 30 pF Typical @ 25°C, VCC = 5.0 V 4
Minimum Setup Time, Address or Data to Enable tsu 75 ns VCC=2.0 V; -55 to 25°C 4
Minimum Setup Time, Address or Data to Enable tsu 13 ns VCC=6.0 V; -55 to 25°C 4
Minimum Hold Time, Enable to Address or Data th 1 ns VCC=2.0 to 6.0 V; all temperatures 4
Minimum Pulse Width, Reset or Enable tw 70 ns VCC=2.0 V; -55 to 25°C 4
Minimum Pulse Width, Reset or Enable tw 13 ns VCC=6.0 V; -55 to 25°C 4
Maximum Input Rise and Fall Times tr, tf 1000 ns VCC=2.0 V; all temperatures 4
Maximum Input Rise and Fall Times tr, tf 400 ns VCC=6.0 V; all temperatures 4

CAD (KiCad official)

  • Symbol: MC74HC259ADR2G
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: mc74hc259adr2g-etched.step / mc74hc259adr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc74hc259adr2g.step / mc74hc259adr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (9 pp, sha256 6c456c835db5ff8e, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF