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PIC18F13K22T-I
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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPIC18F13K22T-I
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SSOP-20-208mil
PIC18F13K22T-I from Microchip Tech, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply for logic and I/O pins. |
| 2 | RA5/OSC1/CLKIN/T13CKI | bidirectional | Digital I/O (TTL) that doubles as oscillator crystal input OSC1, external clock input CLKIN, or Timer1/Timer3 external clock input T13CKI. |
| 3 | RA4/AN3/OSC2/CLKOUT | bidirectional | Digital I/O (TTL) that doubles as ADC channel 3, oscillator crystal output OSC2, or CLKOUT at 1/4 the OSC1 frequency in RC mode. |
| 4 | RA3/MCLR/VPP | input | Digital input (Schmitt trigger) that doubles as active-low Master Clear with internal pull-up or high-voltage programming input VPP. |
| 5 | RC5/CCP1/P1A | bidirectional | Digital I/O (ST) that doubles as Capture 1 input/Compare 1 output/PWM 1 output or Enhanced CCP1 PWM output P1A. |
| 6 | RC4/C2OUT/P1B/SRNQ | bidirectional | Digital I/O (ST) that doubles as Comparator C2 output, Enhanced CCP1 PWM output P1B, or SR latch inverted output SRNQ. |
| 7 | RC3/AN7/C12IN3-/P1C/PGM | bidirectional | Digital I/O (ST) that doubles as ADC channel 7, comparator C1/C2 inverting input 3, Enhanced CCP1 PWM output P1C, or low-voltage ICSP programming enable PGM. |
| 8 | RC6/AN8/SS | bidirectional | Digital I/O (ST) that doubles as ADC channel 8 or SPI slave select input SS. |
| 9 | RC7/AN9/SDO | bidirectional | Digital I/O (ST) that doubles as ADC channel 9 or SPI data out SDO. |
| 10 | RB7/TX/CK | bidirectional | Digital I/O (TTL) that doubles as EUSART asynchronous transmit TX or EUSART synchronous clock CK. |
| 11 | RB6/SCK/SCL | bidirectional | Digital I/O (TTL) that doubles as synchronous serial clock input/output SCK for SPI mode or SCL for I2C mode. |
| 12 | RB5/AN11/RX/DT | bidirectional | Digital I/O (TTL) that doubles as ADC channel 11, EUSART asynchronous receive RX, or EUSART synchronous data DT. |
| 13 | RB4/AN10/SDI/SDA | bidirectional | Digital I/O (TTL) that doubles as ADC channel 10, SPI data in SDI, or I2C data I/O SDA. |
| 14 | RC2/AN6/C12IN2-/P1D | bidirectional | Digital I/O (ST) that doubles as ADC channel 6, comparator C1/C2 inverting input 2, or Enhanced CCP1 PWM output P1D. |
| 15 | RC1/AN5/C12IN1- | bidirectional | Digital I/O (ST) that doubles as ADC channel 5 or comparator C1 and C2 inverting input 1. |
| 16 | RC0/AN4/C2IN+ | bidirectional | Digital I/O (ST) that doubles as ADC channel 4 or comparator C2 noninverting input. |
| 17 | RA2/AN2/C1OUT/T0CKI/INT2/SRQ | bidirectional | Digital I/O that doubles as ADC channel 2, comparator C1 output, Timer0 external clock input, external interrupt 2, or SR latch output SRQ. |
| 18 | RA1/AN1/C12IN0-/VREF+/INT1/PGC | bidirectional | Digital I/O (TTL) that doubles as ADC channel 1, comparator C1/C2 inverting input 0, ADC and DAC high reference input VREF+, external interrupt 1, or ICSP programming clock PGC. |
| 19 | RA0/AN0/CVREF/VREF-/C1IN+/INT0/PGD | bidirectional | Digital I/O (TTL) that doubles as ADC channel 0, DAC reference output CVREF/DAC1OUT, ADC and DAC low reference input VREF-, comparator C1 noninverting input, external interrupt 0, or ICSP programming data PGD. |
| 20 | VSS | power_in | Ground reference for logic and I/O pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SSOP-20-208mil |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 2.3 | 5.5 | V | FOSC ≤ 20 MHz | 324 | |
| Supply Voltage | VDD | 3 | 5.5 | V | FOSC ≤ 64 MHz, ≤ 85°C | 324 | |
| RAM Data Retention Voltage | VDR | 1.7 | V | Device in Sleep mode | 324 | ||
| VDD Rise Rate for internal POR | SVDD | 0.05 | V/ms | 324 | |||
| Power-on Reset Release Voltage | VPOR | 1.6 | V | 324 | |||
| Power-on Reset Rearm Voltage | VPORR | 0.8 | V | 324 | |||
| Input Low Voltage, TTL buffer | VIL | 0.8 | V | 4.5V ≤ VDD ≤ 5.5V | 334 | ||
| Input High Voltage, TTL buffer | VIH | 2 | V | 4.5V ≤ VDD ≤ 5.5V | 334 | ||
| Input Leakage Current, I/O ports | IIL | -100 | 5 | 100 | nA | VSS ≤ VPIN ≤ VDD, Pin at high-impedance, -40°C to 85°C | 334 |
| Input Leakage Current, I/O ports | IIL | -1000 | 5 | 1000 | nA | VSS ≤ VPIN ≤ VDD, 85°C to 125°C | 334 |
| Input Leakage Current, MCLR | IIL | -200 | 50 | 200 | nA | VSS ≤ VPIN ≤ VDD | 334 |
| PORTB Weak Pull-up Current | IPUR | 50 | 250 | 400 | µA | VDD = 5.0V, VPIN = VSS | 334 |
| Supply Current RC_RUN, LFINTOSC | IDD | 30 | 55 | µA | -40°C, VDD = 5.0V, FOSC = 31 kHz | 326 | |
| Supply Current RC_RUN, HFINTOSC | IDD | 0.8 | 1 | mA | -40°C to +125°C, VDD = 5.0V, FOSC = 1 MHz | 326 | |
| Supply Current RC_RUN, HFINTOSC | IDD | 3.7 | 4.7 | mA | -40°C to +125°C, VDD = 5.0V, FOSC = 16 MHz | 326 | |
| Supply Current PRI_RUN, EC High | IDD | 3.3 | 4.4 | mA | -40°C to +125°C, VDD = 5.0V, FOSC = 16 MHz | 328 | |
| Supply Current PRI_RUN, EC High | IDD | 12.1 | 14.6 | mA | -40°C to +125°C, VDD = 5.0V, FOSC = 64 MHz | 328 | |
| Supply Current PRI_IDLE, EC High | IDD | 5.3 | 6.3 | mA | -40°C to +125°C, VDD = 5.0V, FOSC = 64 MHz | 329 | |
| Power-down Base Current | IPD | 17 | 40 | µA | VDD = 2.3V, max at +85°C (55 at +125°C), WDT, BOR, FVR, T1OSC disabled | 332 | |
| Power-down Base Current | IPD | 20 | 45 | µA | VDD = 5.0V, max at +85°C (80 at +125°C), WDT, BOR, FVR, T1OSC disabled | 332 | |
| Programming Voltage on MCLR/VPP | VPP | 8 | 9 | V | Note 3, Note 4 | 337 | |
| Brown-out Reset Voltage | VBOR | 2.35 | 2.5 | 2.65 | V | BORV = 2.7V | 345 |
| Brown-out Reset Voltage | VBOR | 2.65 | 2.85 | 3.05 | V | BORV = 2.85V | 345 |
| Power-up Timer Period | TPWRT | 40 | 65 | 140 | ms | PWRTE = 0 | 345 |
| ADC Resolution | NR | 10 | bit | 347 | |||
| ADC Integral Error | EIL | -2 | 2 | LSb | VREF = 3.0V | 347 | |
| ADC Differential Error | EDL | -1.5 | 1.5 | LSb | No missing codes, VREF = 3.0V | 347 | |
| ADC Offset Error | EOFF | -3 | 3 | LSb | VREF = 3.0V | 347 | |
| ADC Gain Error | EGN | -3 | 3 | LSb | VREF = 3.0V | 347 | |
| ADC Reference Voltage Range | VREF | 1.8 | V | VREF+ - VREF- | 347 | ||
| ADC Recommended Source Impedance | ZAIN | 10 | kΩ | Can go higher if external 0.01 µF capacitor is present on input pin | 347 | ||
| Voltage on VDD pin | VDD | -0.3 | 6.5 | V | PIC18F1XK22, with respect to VSS | 319 | |
| Voltage on MCLR pin | VMCLR | -0.3 | 9 | V | with respect to VSS | 319 | |
| Ambient temperature under bias | -40 | 125 | °C | 319 | |||
| Storage temperature | -65 | 150 | °C | 319 | |||
| Maximum current on VSS pin | 250 | mA | -40°C ≤ TA ≤ +85°C, Industrial | 319 | |||
| Maximum current on VDD pin | 250 | mA | -40°C ≤ TA ≤ +85°C, Industrial | 319 | |||
| Maximum output current sunk by any I/O pin | 50 | mA | 319 | ||||
| Maximum output current sourced by any I/O pin | 50 | mA | 319 | ||||
| Clamp current | IK | 20 | mA | VPIN < 0 or VPIN > VDD | 319 | ||
| Operating Ambient Temperature, Industrial | TA | -40 | 85 | °C | Industrial | 320 | |
| Thermal Resistance Junction to Ambient | θJA | 89.3 | °C/W | 20-pin SSOP package | 338 | ||
| Thermal Resistance Junction to Case | θJC | 31.1 | °C/W | 20-pin SSOP package | 338 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | 338 |
CAD (KiCad official)
- Symbol:
PIC18F13K22T-I - Footprint:
Package_SO:SSOP-20_5.3x7.2mm_P0.65mm - 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
- 3D model files:
pic18f13k22t-i-etched.step/pic18f13k22t-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic18f13k22t-i.step/pic18f13k22t-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (387 pp, sha256
21f69d409798287f, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).