component
S-L2N7002SLT1G
Public Made by Adomby adom
LRC MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownS-L2N7002SLT1G
LRC · MOSFETs · SOT-23
S-L2N7002SLT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate terminal, ESD protected (2000 V HBM), with gate-source voltage limited to ±20 V and threshold VGS(th) of 1.0 V min to 2.0 V max at ID = 250 µA. |
| 2 | Source | passive | Source terminal of the N-channel MOSFET, with body-diode source current limited to 300 mA. |
| 3 | Drain | passive | Drain terminal with 60 V maximum drain-source voltage, 320 mA steady-state continuous current at 25°C and 1.5 A pulsed. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain–Source Breakdown Voltage | VBRDSS | 60 | V | VGS = 0, ID = 250μA | 2 | ||
| Forward Transconductance | gfs | 80 | mS | VDS = 5.0 V, ID = 200 mA | 2 | ||
| Drain–Source Voltage | VDSS | 60 | V | 1 | |||
| Gate–Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Drain Current, steady state | ID | 380 | mA | Steady State TA = 25°C | 1 | ||
| Drain Current, steady state | ID | 270 | mA | Steady State TA = 85°C | 1 | ||
| Drain Current, t<5s | ID | 320 | mA | t<5s TA = 25°C | 1 | ||
| Drain Current, t<5s | ID | 230 | mA | t<5s TA = 85°C | 1 | ||
| Pulsed Drain Current | IDM | 1.5 | A | tp=10μs | 1 | ||
| Source Current (Body Diode) | IS | 300 | mA | 1 | |||
| Gate–Source ESD Rating | ESD | 2000 | V | HBM, Method 3015 | 2 | ||
| Total Device Dissipation | PD | 420 | mW | 2 | |||
| Total Device Dissipation | PD | 300 | mW | 2 | |||
| Junction-to-Ambient Thermal Resistance | RΘJA | 417 | ºC/W | 2 | |||
| Junction-to-Ambient Thermal Resistance | RΘJA | 300 | ºC/W | 2 | |||
| Junction and Storage Temperature | TJ,Tstg | -55 | 150 | ºC | 2 | ||
| Lead Temperature for Soldering Purposes | TL | 260 | ºC | 1/8 in from case for 10 s | 2 |
CAD (KiCad official)
- Symbol:
S-L2N7002SLT1G - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
s-l2n7002slt1g-etched.step/s-l2n7002slt1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);s-l2n7002slt1g.step/s-l2n7002slt1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LRC datasheet (6 pp, sha256
d553457dda5c662f, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).