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MM74HC573MTCX

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by adom

onsemi Latches, TSSOP-20. Pinout settled in review by an AI reviewer against the manufacturer's datasheet, KiCad symbol/footprint/3D.

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Contents

README

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MM74HC573MTCX

onsemi · Latches · TSSOP-20

MM74HC573MTCX from onsemi, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTPUT CONTROL input Active-low 3-state output control; a HIGH level puts all outputs in high impedance regardless of other inputs and stored data.
2 1D input Data input for latch 1, with input current of 1 µA maximum.
3 2D input Data input for latch 2, with input current of 1 µA maximum.
4 3D input Data input for latch 3, with input current of 1 µA maximum.
5 4D input Data input for latch 4, with input current of 1 µA maximum.
6 5D input Data input for latch 5, with input current of 1 µA maximum.
7 6D input Data input for latch 6, with input current of 1 µA maximum.
8 7D input Data input for latch 7, with input current of 1 µA maximum.
9 8D input Data input for latch 8, with input current of 1 µA maximum.
10 GND power_in Ground, 0 V reference for all voltages.
11 LATCH ENABLE input Latch enable input; Q outputs follow D inputs when HIGH and data is retained when LOW.
12 8Q tri_state 3-state output of latch 8, drives 15 LS-TTL loads and goes high impedance when OUTPUT CONTROL is HIGH.
13 7Q tri_state 3-state output of latch 7, drives 15 LS-TTL loads and goes high impedance when OUTPUT CONTROL is HIGH.
14 6Q tri_state 3-state output of latch 6, drives 15 LS-TTL loads and goes high impedance when OUTPUT CONTROL is HIGH.
15 5Q tri_state 3-state output of latch 5, drives 15 LS-TTL loads and goes high impedance when OUTPUT CONTROL is HIGH.
16 4Q tri_state 3-state output of latch 4, drives 15 LS-TTL loads and goes high impedance when OUTPUT CONTROL is HIGH.
17 3Q tri_state 3-state output of latch 3, drives 15 LS-TTL loads and goes high impedance when OUTPUT CONTROL is HIGH.
18 2Q tri_state 3-state output of latch 2, drives 15 LS-TTL loads and goes high impedance when OUTPUT CONTROL is HIGH.
19 1Q tri_state 3-state output of latch 1, drives 15 LS-TTL loads and goes high impedance when OUTPUT CONTROL is HIGH.
20 VCC power_in Positive supply, recommended operating range 2 to 6 V (absolute maximum 7.0 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-20
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC 2 6 V 3
DC Input or Output Voltage VIN, VOUT 0 V 3
Operating Temperature Range TA -40 85 °C 3
Input Rise or Fall Time tr, tf 1000 ns VCC 2.0V 3
Input Rise or Fall Time tr, tf 500 ns VCC 4.5V 3
Input Rise or Fall Time tr, tf 400 ns VCC 6.0V 3
Supply Voltage VCC -0.5 7 V 3
DC Input Voltage VIN -1.5 V 3
DC Output Voltage VOUT -0.5 V 3
Clamp Diode Current IIK, IOK -20 20 mA 3
DC Output Current, per pin IOUT -35 35 mA 3
DC VCC or GND Current, per pin ICC -70 70 mA 3
Storage Temperature Range TSTG -65 150 °C 3
Power Dissipation PD 600 mW Note 3 3
Lead Temperature TL 260 °C Soldering 10 seconds 3
Minimum HIGH Level Input Voltage VIH 1.5 1.5 V VCC 2.0V 3
Minimum HIGH Level Input Voltage VIH 3.15 3.15 V VCC 4.5V 3
Minimum HIGH Level Input Voltage VIH 4.2 4.2 V VCC 6.0V 3
Maximum LOW Level Input Voltage VIL 0.5 0.5 V VCC 2.0V 3
Maximum LOW Level Input Voltage VIL 1.35 1.35 V VCC 4.5V 3
Maximum LOW Level Input Voltage VIL 1.8 1.8 V VCC 6.0V 3
Minimum HIGH Level Output Voltage VOH 1.9 2 V VIN VIH or VIL, /IOUT/ ≤ 20 µA, VCC 2.0V 3
Minimum HIGH Level Output Voltage VOH 4.4 4.5 V VIN VIH or VIL, /IOUT/ ≤ 20 µA, VCC 4.5V 3
Minimum HIGH Level Output Voltage VOH 5.9 6 V VIN VIH or VIL, /IOUT/ ≤ 20 µA, VCC 6.0V 3
Minimum HIGH Level Output Voltage VOH 3.84 4.2 V VIN VIH or VIL, /IOUT/ ≤ 6.0 mA, VCC 4.5V 3
Minimum HIGH Level Output Voltage VOH 5.34 5.7 V VIN VIH or VIL, /IOUT/ ≤ 7.8 mA, VCC 6.0V 3
Maximum LOW Level Output Voltage VOL 0 0.1 V VIN VIH or VIL, /IOUT/ ≤ 20 µA, VCC 2.0V 3
Maximum LOW Level Output Voltage VOL 0.2 0.33 V VIN VIH or VIL, /IOUT/ ≤ 6.0 mA, VCC 4.5V 3
Maximum Input Current IIN -1 1 µA VIN VCC or GND, VCC 6.0V 3
Maximum 3-STATE Output Leakage Current IOZ -5 5 µA VOUT VCC or GND, OC VIH, VCC 6.0V 3
Maximum Quiescent Supply Current ICC 8 80 µA VIN VCC or GND, IOUT 0 µA, VCC 6.0V 3
Quiescent Supply Current per Input Pin ΔICC 1 1.8 mA VCC 5.5V, VIN 2.4V or 0.4V, OE input 3
Quiescent Supply Current per Input Pin ΔICC 0.6 1 mA VCC 5.5V, VIN 2.4V or 0.4V, LE input 3
Quiescent Supply Current per Input Pin ΔICC 0.4 0.6 mA VCC 5.5V, VIN 2.4V or 0.4V, DATA input 3
Maximum Propagation Delay, Data to Q tPHL, tPLH 45 138 ns CL 50 pF, VCC 2.0V 4
Maximum Propagation Delay, Data to Q tPHL, tPLH 17 28 ns CL 50 pF, VCC 4.5V 4
Maximum Propagation Delay, Data to Q tPHL, tPLH 15 24 ns CL 50 pF, VCC 6.0V 4
Maximum Propagation Delay, LE to Q tPHL, tPLH 46 138 ns CL 50 pF, VCC 2.0V 4
Maximum Propagation Delay, LE to Q tPHL, tPLH 14 29 ns CL 50 pF, VCC 4.5V 4
Maximum Propagation Delay, LE to Q tPHL, tPLH 12 25 ns CL 50 pF, VCC 6.0V 4
Maximum Output Enable Time tPZH, tPZL 55 175 ns RL 1 kΩ, CL 50 pF, VCC 2.0V 4
Maximum Output Enable Time tPZH, tPZL 15 35 ns RL 1 kΩ, CL 50 pF, VCC 4.5V 4
Maximum Output Enable Time tPZH, tPZL 14 30 ns RL 1 kΩ, CL 50 pF, VCC 6.0V 4
Maximum Output Disable Time tPHZ, tPLZ 40 156 ns RL 1 kΩ, VCC 2.0V 4
Maximum Output Disable Time tPHZ, tPLZ 13 31 ns RL 1 kΩ, CL 50 pF, VCC 4.5V 4
Maximum Output Disable Time tPHZ, tPLZ 12 27 ns RL 1 kΩ, VCC 6.0V 4
Minimum Set Up Time, Data to LE tS 95 30 ns VCC 2.0V 4
Minimum Set Up Time, Data to LE tS 19 10 ns VCC 4.5V 4
Minimum Set Up Time, Data to LE tS 16 9 ns VCC 6.0V 4
Minimum Hold Time, LE to Data tH 31 25 ns VCC 2.0V 4
Minimum Hold Time, LE to Data tH 6 5 ns VCC 4.5V 4
Minimum Hold Time, LE to Data tH 5 4 ns VCC 6.0V 4
Minimum Pulse Width, LE or Data tW 100 30 ns VCC 2.0V 4
Minimum Pulse Width, LE or Data tW 20 9 ns VCC 4.5V 4
Minimum Pulse Width, LE or Data tW 18 8 ns VCC 6.0V 4
Maximum Input Capacitance CIN 5 10 pF 4
Maximum Output Capacitance COUT 15 20 pF 5

CAD (KiCad official)

  • Symbol: MM74HC573MTCX
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: mm74hc573mtcx-etched.step / mm74hc573mtcx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mm74hc573mtcx.step / mm74hc573mtcx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (10 pp, sha256 bb27d336c8c4fb66, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF