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README

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AVR128DA48T-I

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-48(7x7)

AVR128DA48T-I from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA5 bidirectional General-purpose I/O pin PA5 with alternate functions ADC0 input X5/Y5, USART0 RxD (alternate position), SPI0 MISO and TCA0 WO5.
2 PA6 bidirectional General-purpose I/O pin PA6 with alternate functions ADC0 input X6/Y6, USART0 XCK (alternate position), SPI0 SCK, TCA0 WOC and CCL LUT0 OUT.
3 PA7 bidirectional General-purpose I/O pin PA7 with alternate functions CLKOUT, ADC0 input X7/Y7, ZCD OUT (default position), SPI0 SS, TCA0 WOD and Event output EVOUTA (alternate position).
4 PB0 bidirectional General-purpose I/O pin PB0 with alternate functions ADC0 input X8/Y8, USART3 TxD (alternate position), TCA0 WO0 (alternate position) and CCL LUT4 IN0.
5 PB1 bidirectional General-purpose I/O pin PB1 with alternate functions ADC0 input X9/Y9, USART3 RxD (alternate position), TCA0 WO1 (alternate position) and CCL LUT4 IN1.
6 PB2 bidirectional General-purpose I/O pin PB2 with alternate functions ADC0 input X10/Y10, USART3 XCK (alternate position), TWI1 SDA (host, alternate position), TCA0 WO2 (alternate position), Event output EVOUTB and CCL LUT4 IN2.
7 PB3 bidirectional General-purpose I/O pin PB3 with alternate functions ADC0 input X11/Y11, USART3 XDIR (alternate position), TWI1 SCL (host, alternate position), TCA0 WO3 (alternate position) and CCL LUT4 OUT.
8 PB4 bidirectional General-purpose I/O pin PB4 with alternate functions ADC0 input X12/Y12, USART3 TxD (alternate position), SPI1 MOSI (alternate position), TCA0 WO4 (alternate position), TCB0 WO and TCA0 WOA (alternate position).
9 PB5 bidirectional General-purpose I/O pin PB5 with alternate functions ADC0 input X13/Y13, USART3 RxD (alternate position), SPI1 MISO (alternate position), TCA0 WO5 (alternate position), TCB1 WO and TCA0 WOB (alternate position).
10 PC0 bidirectional General-purpose I/O pin PC0 with alternate functions USART1 TxD, SPI1 MOSI, TCA0 WO0 (alternate position), TCB0 WO and CCL LUT1 IN0.
11 PC1 bidirectional General-purpose I/O pin PC1 with alternate functions USART1 RxD, SPI1 MISO, TCA0 WO1 (alternate position), TCB1 WO and CCL LUT1 IN1.
12 PC2 bidirectional General-purpose I/O pin PC2 with alternate functions TWI0 SDA (host, alternate position), USART1 XCK, SPI1 SCK, TCA0 WO2 (alternate position), Event output EVOUTC and CCL LUT1 IN2.
13 PC3 bidirectional General-purpose I/O pin PC3 with alternate functions TWI0 SCL (host, alternate position), USART1 XDIR, SPI1 SS, TCA0 WO3 (alternate position) and CCL LUT1 OUT.
14 VDD power_in Digital supply pin; all VDD pins are internally connected and must be held at the same voltage.
15 GND power_in Ground pin; each supply pin pair (VDD or AVDD with GND) needs its own decoupling capacitor placed close to the device.
16 PC4 bidirectional General-purpose I/O pin PC4 with alternate functions USART1 TxD (alternate position), SPI1 MOSI (alternate position) and TCA0 WO4 (alternate position), TCB0 WO (alternate position).
17 PC5 bidirectional General-purpose I/O pin PC5 with alternate functions USART1 RxD (alternate position), SPI1 MISO (alternate position), TCA0 WO5 (alternate position) and TCB1 WO (alternate position).
18 PC6 bidirectional General-purpose I/O pin PC6 with alternate functions CCL LUT OUT (alternate position), USART1 XCK (alternate position), SPI1 SCK (alternate position), TWI0 SDA (client, alternate position) and TCA0 WO2 (alternate position).
19 PC7 bidirectional General-purpose I/O pin PC7 with alternate functions CCL LUT OUT (alternate position), USART1 XDIR (alternate position), SPI1 SS (alternate position), TWI0 SCL (client, alternate position) and Event output EVOUTC (alternate position).
20 PD0 bidirectional General-purpose I/O pin PD0 with alternate functions ADC0 input AIN0, analog comparator AC0 negative input (AINN1 variants), TCA0 WO0 (alternate position) and CCL LUT2 IN0.
21 PD1 bidirectional General-purpose I/O pin PD1 with alternate functions ADC0 input AIN1, analog comparator AC0 ZCIN input, TCA0 WO1 (alternate position) and CCL LUT2 IN1.
22 PD2 bidirectional General-purpose I/O pin PD2 with alternate functions ADC0 input AIN2, analog comparator AC0 positive input (AINP0 variants), TCA0 WO2 (alternate position), Event output EVOUTD and CCL LUT2 IN2.
23 PD3 bidirectional General-purpose I/O pin PD3 with alternate functions ADC0 input AIN3, analog comparator AC0 negative/positive inputs (AINN0, AINP1), TCA0 WO3 (alternate position) and CCL LUT2 OUT.
24 PD4 bidirectional General-purpose I/O pin PD4 with alternate functions ADC0 input AIN4, analog comparator positive input AINP2/AINP1 (alternate), and TCA0 WO4 (alternate position).
25 PD5 bidirectional General-purpose I/O pin PD5 with alternate functions ADC0 input AIN5, analog comparator negative input AINN0, and TCA0 WO5 (alternate position).
26 PD6 bidirectional General-purpose I/O pin PD6 with alternate functions ADC0 input AIN6, analog comparator positive input AINP3 variants, DAC0 output VOUT and CCL LUT2 OUT (alternate position).
27 PD7 bidirectional General-purpose I/O pin PD7 with alternate functions external voltage reference input VREFA, ADC0 input AIN7, analog comparator negative input AINN2 variants and Event output EVOUTD (alternate position).
28 AVDD power_in Analog supply pin; the datasheet states that VDD and AVDD are internally connected on the AVR DA family, so both must be at the same voltage.
29 GND power_in Ground pin; each supply pin pair needs its own decoupling capacitor placed close to the device.
30 PE0 bidirectional General-purpose I/O pin PE0 with alternate functions ADC0 input AIN8, analog comparator positive input AINP1, USART4 TxD, SPI0 MOSI (alternate position) and TCA0 WO0 (alternate position).
31 PE1 bidirectional General-purpose I/O pin PE1 with alternate functions ADC0 input AIN9, analog comparator positive input AINP2, USART4 RxD, SPI0 MISO (alternate position) and TCA0 WO1 (alternate position).
32 PE2 bidirectional General-purpose I/O pin PE2 with alternate functions ADC0 input AIN10, analog comparator positive input AINP2, USART4 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position) and Event output EVOUTE.
33 PE3 bidirectional General-purpose I/O pin PE3 with alternate functions ADC0 input AIN11, analog comparator ZCIN input, USART4 XDIR, SPI0 SS (alternate position) and TCA0 WO3 (alternate position).
34 PF0 bidirectional General-purpose I/O pin PF0 that serves as XTAL32K1 for the 32.768 kHz crystal oscillator, with ADC0 positive input-only AIN16 and USART2 TxD and TCA0 WOA (alternate position) as alternate functions.
35 PF1 bidirectional General-purpose I/O pin PF1 that serves as XTAL32K2 for the 32.768 kHz crystal oscillator, with ADC0 positive input-only AIN17 and USART2 RxD and TCA0 WOB (alternate position) as alternate functions.
36 PF2 bidirectional General-purpose I/O pin PF2 with alternate functions ADC0 positive input-only AIN18, TWI1 SDA (host), USART2 XCK, TCA0 WOC (alternate position), Event output EVOUTF and CCL LUT3 IN2.
37 PF3 bidirectional General-purpose I/O pin PF3 with alternate functions ADC0 positive input-only AIN19, TWI1 SCL (host), USART2 XDIR, TCA0 WOD (alternate position) and CCL LUT3 OUT.
38 PF4 bidirectional General-purpose I/O pin PF4 with alternate functions ADC0 positive input-only AIN20, USART2 TxD (alternate position) and TCB0 WO (alternate position).
39 PF5 bidirectional General-purpose I/O pin PF5 with alternate functions ADC0 positive input-only AIN21, USART2 RxD (alternate position) and TCB1 WO (alternate position).
40 PF6 input Input-only pin PF6 that functions as RESET when the RSTPINCFG fuse enables external Reset, otherwise it is a general-purpose input.
41 UPDI bidirectional Dedicated Unified Program and Debug Interface pin for one-wire UART programming and debug, with no other function on the pin.
42 VDD power_in Digital supply pin; all VDD pins are internally connected and must be held at the same voltage.
43 GND power_in Ground pin; each supply pin pair needs its own decoupling capacitor placed close to the device.
44 PA0 bidirectional General-purpose I/O pin PA0 that can serve as EXTCLK external clock input, with ADC0 input X0/Y0, USART0 TxD, TCA0 WO0 and CCL LUT0 IN0 as alternate functions.
45 PA1 bidirectional General-purpose I/O pin PA1 with alternate functions ADC0 input X1/Y1, USART0 RxD, TCA0 WO1 and CCL LUT0 IN1.
46 PA2 bidirectional General-purpose I/O pin PA2 with alternate functions ADC0 input X2/Y2, TWI0 SDA (host), USART0 XCK, TCA0 WO2, TCB0 WO, Event output EVOUTA and CCL LUT0 IN2.
47 PA3 bidirectional General-purpose I/O pin PA3 with alternate functions ADC0 input X3/Y3, TWI0 SCL (host), USART0 XDIR, TCA0 WO3 (alternate position), TCB1 WO and CCL LUT0 OUT.
48 PA4 bidirectional General-purpose I/O pin PA4 with alternate functions ADC0 input X4/Y4, USART0 TxD (alternate position), SPI0 MOSI, TCA0 WO4 and TCA0 WOA.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-48(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage 1.8 5.5 V Table 39-1, AVR128DA48 -I TQFP (Tape & Reel and Tray) 649
Operating temperature range (industrial) -40 85 °C Table 39-1, AVR128DA48 -I TQFP 649
Maximum frequency 24 MHz Table 2 peripheral overview, 48-pin column 2

CAD (KiCad official)

  • Symbol: AVR128DA48T-I
  • Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
  • 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: avr128da48t-i-pt-etched.step / avr128da48t-i-pt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); avr128da48t-i-pt.step / avr128da48t-i-pt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (700 pp, sha256 0001076aa7fb795a, retrieved 2026-11-13, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF