component
DAC81402RHBR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), VQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownDAC81402RHBR
Texas Instruments · Digital To Analog Converters (DAC) · VQFN-32(5x5)
DAC81402RHBR from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection. |
| 2 | NC | unconnected | No connection. |
| 3 | NC | unconnected | No connection. |
| 4 | NC | unconnected | No connection. |
| 5 | SENSENA | input | Channel-A sense pin for the negative voltage output load connection. |
| 6 | SENSEPA | input | Channel-A sense pin for the positive voltage output load connection. |
| 7 | CCOMPA | input | Channel-A external compensation capacitor connection pin improving output buffer stability with high capacitive loads. |
| 8 | OUTA | output | Channel-A analog output voltage. |
| 9 | SDO | output | Serial interface data output clocked from input shift register on rising or falling edges of SCLK as specified by FSDO bit. |
| 10 | SCLK | input | Serial interface clock. |
| 11 | SDIN | input | Serial interface data input clocked into input shift register on each falling edge of SCLK. |
| 12 | SYNC | input | Active low serial data enable frame synchronization signal enabling input shift register when low. |
| 13 | LDAC | input | Active low synchronization signal updating DAC outputs of channels configured in synchronous mode when low. |
| 14 | GND | power_in | Digital ground reference point. |
| 15 | IOVDD | power_in | IO supply voltage setting the digital I/O operating voltage for the device. |
| 16 | CLR | input | Active-low clear input clearing all outputs to their clear code when low. |
| 17 | OUTB | output | Channel-B analog output voltage. |
| 18 | CCOMPB | input | Channel-B external compensation capacitor connection pin improving output buffer stability with high capacitive loads. |
| 19 | SENSEPB | input | Channel-B sense pin for the positive voltage output load connection. |
| 20 | SENSENB | input | Channel-B sense pin for the negative voltage output load connection. |
| 21 | NC | unconnected | No connection. |
| 22 | NC | unconnected | No connection. |
| 23 | NC | unconnected | No connection. |
| 24 | NC | unconnected | No connection. |
| 25 | REFGND | power_in | Ground reference point for the internal reference. |
| 26 | REFIO | bidirectional | Reference input when operating with external reference or reference output when using internal reference; connect 150-nF capacitor to ground. |
| 27 | AVSS | power_in | Output buffers negative supply voltage. |
| 28 | AVDD | power_in | Output buffers positive supply voltage. |
| 29 | AGND | power_in | Analog ground reference point. |
| 30 | DVDD | power_in | Digital and analog supply voltage. |
| 31 | FAULT | tri_state | Open-drain fault-condition output requiring external 10-kΩ pullup resistor to voltage no higher than IOVDD. |
| 32 | RST | input | Active-low reset input causing power-on-reset event when low. |
| 33 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32(5x5) |
| Category | Data Acquisition |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
DAC81402RHBR - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
- 3D model files:
dac81402rhbr-etched.step/dac81402rhbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dac81402rhbr.step/dac81402rhbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (55 pp, sha256
21559801013f88d2, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).