component

STM32G051K6T6

Public Made by Adom

by adom

STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32g051k6t6factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

STM32G051K6T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

STM32G051K6T6 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PB9 bidirectional General-purpose I/O, 5 V-tolerant with Fm+ capability; IR output, TIM17 channel, SPI2 select, or I2C1 data line.
2 PC14-OSC32_IN input Low-speed oscillator input (32 kHz) or TIM1 brake input; 5 V-tolerant I/O.
3 PC15-OSC32_OUT output Low-speed oscillator output (32 kHz) or TIM15 brake input; 5 V-tolerant with oscillator enable.
4 VDD/VDDA power_in Power supply for digital and analog domains, 1.7 V to 3.6 V; requires 100 nF + 4.7 µF decoupling capacitors.
5 VSS/VSSA power_in Ground return for digital and analog domains; must be connected to PCB ground plane.
6 PF2-NRST bidirectional System reset input with internal weak pull-up; supports master clock output (MCO) alternate function.
7 PA0 bidirectional Programmable I/O, 5 V-tolerant with analog-switch function; ADC channel 0, tamper input, wakeup 1, or alternate SPI/USART/timer/comparator.
8 PA1 bidirectional Programmable I/O, 5 V-tolerant with switchable diode to VDD; ADC channel 1 or alternate SPI/USART/timer/I2C functions.
9 PA2 bidirectional Programmable I/O, 5 V-tolerant with analog-switch function; ADC channel 2, wakeup 4, or alternate SPI/USART/timer/UART/comparator.
10 PA3 bidirectional Programmable I/O, 5 V-tolerant with switchable diode to VDD; ADC channel 3 or alternate SPI/USART/timer/UART functions.
11 PA4 bidirectional Programmable I/O, 5 V-tolerant with analog-switch function; ADC channel 4, DAC1 output 1, or alternate SPI/timer/LPTIM.
12 PA5 bidirectional Programmable I/O, 5 V-tolerant with switchable diode to VDD; ADC channel 5, DAC1 output 2, or alternate SPI/timer.
13 PA6 bidirectional Programmable I/O, 5 V-tolerant with switchable diode to VDD; ADC channel 6 or alternate SPI/timer/brake/UART/comparator.
14 PA7 bidirectional Programmable I/O, 5 V-tolerant with analog-switch function; ADC channel 7 or alternate SPI/timer/comparator functions.
15 PB0 bidirectional Programmable I/O, 5 V-tolerant with switchable diode to VDD; ADC channel 8 or alternate SPI/timer/comparator.
16 PB1 bidirectional Programmable I/O, 5 V-tolerant with switchable diode to VDD; ADC channel 9 or alternate timer/UART/event functions.
17 PB2 bidirectional Programmable I/O, 5 V-tolerant with switchable diode to VDD; ADC channel 10 or alternate SPI/LPTIM/event functions.
18 PA8 bidirectional Programmable I/O, 5 V-tolerant; master clock output, SPI2 select, TIM1 channel, or LPTIM2 output.
19 PA9 bidirectional Programmable I/O, 5 V-tolerant with Fm+ capability; USART1 TX, TIM1 channel, SPI2 input, or I2C1 clock; remappable via SYSCFG.
20 PC6 bidirectional Programmable I/O, 5 V-tolerant; TIM3 or TIM2 channel output.
21 PA10 bidirectional Programmable I/O, 5 V-tolerant with Fm+ capability; USART1 RX, TIM1 channel, or I2C1 data line; remappable via SYSCFG.
22 PA11 [PA9] bidirectional Programmable I/O, 5 V-tolerant Fm+ capable with analog-switch function; SPI/USART/timer/I2C functions; can be remapped from PA9.
23 PA12 [PA10] bidirectional Programmable I/O, 5 V-tolerant Fm+ capable with analog-switch function; SPI/USART/timer/I2C functions; can be remapped from PA10.
24 PA13 bidirectional Serial wire debug I/O (SWDIO), 5 V-tolerant with switchable diode to VDD; configured with internal pull-up at reset.
25 PA14-BOOT0 bidirectional Boot mode select and serial wire debug clock (SWCLK), 5 V-tolerant with analog-switch; internal pull-down at reset.
26 PA15 bidirectional Programmable I/O, 5 V-tolerant; SPI chip select, USART receive, timer channel, or event output.
27 PB3 bidirectional Programmable I/O, 5 V-tolerant with analog-switch function; comparator input or alternate SPI/timer/USART.
28 PB4 bidirectional Programmable I/O, 5 V-tolerant with analog-switch function; comparator input or alternate SPI/timer/USART.
29 PB5 bidirectional Programmable I/O, 5 V-tolerant; wakeup 6, comparator output, or alternate SPI/timer/LPTIM/I2C.
30 PB6 bidirectional Programmable I/O, 5 V-tolerant Fm+ capable with analog-switch; USART TX, timer, SPI, LPTIM, or I2C clock.
31 PB7 bidirectional Programmable I/O, 5 V-tolerant Fm+ capable with analog-switch; USART RX, SPI, timer, LPTIM, or I2C data; PVD input.
32 PB8 bidirectional Programmable I/O, 5 V-tolerant Fm+ capable; SPI clock, TIM16 channel, timer brake, or I2C clock line.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

CAD (KiCad official)

  • Symbol: STM32G051K6T6
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32g051k6t6-etched.step / stm32g051k6t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32g051k6t6.step / stm32g051k6t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (126 pp, sha256 773ba84c25c7d2f3, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF