Contents

README

markdown

SN74LVC2G74DCTR

Texas Instruments · Flip Flops · MSOP-8

SN74LVC2G74DCTR from Texas Instruments, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1CLR input Asynchronous clear, active-low. Driving low forces Q low and Q̄ high independent of CLK/D. CMOS input; VIH/VIL per LVC family levels.
2 1D input Synchronous data input. Value is latched to Q on the rising edge of CLK when PRE and CLR are both high.
3 1CLK input Clock input. Positive-edge triggered; D is transferred to Q on the low-to-high transition.
4 VCC power_in Positive supply, 1.65 V to 5.5 V (LVC family). Bypass with a 0.1 µF ceramic capacitor placed close to the pin.
5 1PRE input Asynchronous preset, active-low. Driving low forces Q high and Q̄ low independent of CLK/D. When both PRE and CLR are low, both outputs are high (invalid state).
6 1Q output Non-inverted flip-flop output. Push-pull CMOS drive; IOL/IOH per LVC datasheet (typically ±24 mA at 3.3 V).
7 1Q_N output Inverted flip-flop output (Q̄), complementary to 1Q. Push-pull CMOS drive matched to 1Q.
8 GND power_in Ground reference (0 V) for the device.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package MSOP-8
Category Logic
Pins 8

Ordering variants

  • SN74LVC2G74DCTR
  • SN74LVC2G74DCTRDCTT

CAD (KiCad official)

  • Symbol: SN74LVC2G74DCTR
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 192fc34e666f7e45, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

Open full view ↗

PCB Footprint

Open full view ↗