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TPS54618QRTERQ1
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Texas Instruments DC-DC Converters, WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS54618QRTERQ1
Texas Instruments · DC-DC Converters · WQFN-16-EP(3x3)
TPS54618QRTERQ1 from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply voltage, 2.95 V to 6 V. |
| 2 | VIN | power_in | Input supply voltage, 2.95 V to 6 V. |
| 3 | GND | power_in | Power ground, to be electrically connected directly to the power pad under the device. |
| 4 | GND | power_in | Power ground, to be electrically connected directly to the power pad under the device. |
| 5 | AGND | power_in | Analog ground, to be electrically connected to GND close to the device. |
| 6 | VSENSE | input | Inverting node of the transconductance (gm) error amplifier. |
| 7 | COMP | output | Error amplifier output and input to the output switch current comparator; connect frequency compensation components to this pin. |
| 8 | RT/CLK | bidirectional | Resistor timing or external clock input pin. |
| 9 | SS/TR | bidirectional | Slow-start and tracking pin; an external capacitor sets the output voltage rise time, and the pin can also be used for tracking. |
| 10 | PH | output | Source of the internal high-side power MOSFET and drain of the internal low-side (synchronous) rectifier MOSFET. |
| 11 | PH | output | Source of the internal high-side power MOSFET and drain of the internal low-side (synchronous) rectifier MOSFET. |
| 12 | PH | output | Source of the internal high-side power MOSFET and drain of the internal low-side (synchronous) rectifier MOSFET. |
| 13 | BOOT | passive | Bootstrap capacitor connection required between BOOT and PH; output is forced off if the capacitor voltage is below the BOOT UVLO minimum. |
| 14 | PWRGD | output | Open-drain output that asserts low if output voltage is low due to thermal shutdown, overcurrent, over/undervoltage or EN shutdown. |
| 15 | EN | input | Enable pin with internal pullup current source; pull below 1.2 V to disable, float to enable, and use two resistors to adjust the UVLO threshold. |
| 16 | VIN | power_in | Input supply voltage, 2.95 V to 6 V. |
| 17 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-16-EP(3x3) |
| Category | Power Supply Chip |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage (PWRGD, VIN) | -0.3 | 7 | V | 4 | |||
| Input voltage (EN, RT/CLK) | -0.3 | 4 | V | 4 | |||
| Input voltage (COMP, SS, VSENSE) | -0.3 | 3 | V | 4 | |||
| Output voltage BOOT-PH | 7 | V | 4 | ||||
| Output voltage PH | -0.6 | 7 | V | 4 | |||
| Output voltage PH (10-ns transient) | -2 | 10 | V | 10-ns transient | 4 | ||
| Source current EN, RT/CLK | 100 | µA | 4 | ||||
| Sink current COMP, SS | 100 | µA | 4 | ||||
| Sink current PWRGD | 10 | mA | 4 | ||||
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Input voltage | VVIN | 3 | 6 | V | 4 | ||
| Operating ambient temperature | TA | -40 | 125 | °C | 4 | ||
| Operating input voltage | 2.95 | 6 | V | 5 | |||
| VIN UVLO STOP | 2.28 | 2.5 | V | 5 | |||
| VIN UVLO START | 2.45 | 2.6 | V | 5 | |||
| Shutdown supply current | 5.5 | 15 | μA | EN = 0 V, 25°C, 2.95 V ≤ VIN ≤ 6 V | 5 | ||
| Quiescent current | Iq | 515 | 650 | μA | VSENSE = 0.9 V, VIN = 5 V, 25°C, RT = 400 kΩ | 5 | |
| Voltage reference | Vref | 0.791 | 0.799 | 0.807 | V | 2.95 V ≤ VIN ≤ 6 V, -40°C <TJ < 150°C | 5 |
| High-side switch resistance | 12 | 25 | mΩ | BOOT-PH = 5 V | 5 | ||
| High-side switch resistance | 16 | 33 | mΩ | BOOT-PH = 2.95 V | 5 | ||
| Low-side switch resistance | 13 | 25 | mΩ | VIN = 5 V | 5 | ||
| Low-side switch resistance | 17 | 33 | mΩ | VIN = 2.95 V | 5 | ||
| Current limit threshold | 7.46 | 10.6 | 15.3 | A | VIN = 6 V, 25°C < TJ < 150°C | 5 | |
| Current limit threshold | 7.68 | 10.2 | 13.5 | A | VIN = 2.95 V, 25°C < TJ < 150°C | 5 | |
| Switching frequency | 400 | 500 | 600 | kHz | Rt = 400 kΩ | 6 | |
| Switching frequency range using RT mode | 200 | 2000 | kHz | 6 | |||
| Switching frequency range using CLK mode | 300 | 2000 | kHz | 6 | |||
| RT/CLK high threshold | 1.6 | 2.2 | V | 6 | |||
| RT/CLK low threshold | 0.4 | 0.6 | V | 6 | |||
| PWRGD ON-resistance | 56 | 100 | Ω | 6 | |||
| PWRGD output low | 0.2 | 0.3 | V | I(PWRGD) = 3 mA | 6 | ||
| Minimum VIN for valid output | 0.65 | 1.5 | V | V(PWRGD) < 0.5 V at 100 μA | 6 | ||
| Minimum CLK pulse width | 75 | ns | 6 | ||||
| Junction-to-ambient thermal resistance | RθJA | 44.38 | °C/W | RTE (WQFN) 16 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 46.09 | °C/W | 4 | |||
| Junction-to-board thermal resistance | RθJB | 15.96 | °C/W | 4 | |||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 4.55 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
TPS54618QRTERQ1 - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
tps54618qrterq1-etched.step/tps54618qrterq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps54618qrterq1.step/tps54618qrterq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
bd3d217442016b00, retrieved 2026-10-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).