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CT425-HSN820MR

Public Made by Adom

by adom

Allegro MicroSystems, LLC Current Sensors, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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CT425-HSN820MR

Allegro MicroSystems, LLC · Current Sensors · SOIC-8

CT425-HSN820MR from Allegro MicroSystems, LLC, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IP+ passive Input primary conductor (positive) terminal of the integrated current carrying conductor, shorted with pin 2 (max 70 A at TA = 25°C, about 1 mΩ resistance).
2 IP+ passive Input primary conductor (positive) terminal of the integrated current carrying conductor, shorted with pin 1 (max 70 A at TA = 25°C, about 1 mΩ resistance).
3 IP- passive Primary conductor (negative) terminal of the integrated current carrying conductor, shorted with pin 4 (max 70 A at TA = 25°C, about 1 mΩ resistance).
4 IP- passive Primary conductor (negative) terminal of the integrated current carrying conductor, shorted with pin 3 (max 70 A at TA = 25°C, about 1 mΩ resistance).
5 GND power_in Ground.
6 FILTER passive Filter pin to improve noise performance by connecting an external capacitor to set the cut-off frequency; leave unconnected if not used.
7 OUT output Analog output voltage representing the measured current, with linear range 0.50 to 4.50 V and drive capability of ±1.0 mA.
8 VCC power_in Supply voltage, 4.75 to 5.50 V recommended (absolute maximum -0.3 to 6.0 V), decoupled with a 1.0 µF capacitor.

Key specifications

Parameter Value
Manufacturer Allegro MicroSystems, LLC
Package SOIC-8
Category Magnetic Sensors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage Range VCC 4.75 5 5.5 V 4
Output Voltage Range VOUT 0 V 0 to VCC 4
Output Current IOUT -1 1 mA 4
Operating Ambient Temperature TA -40 25 125 °C Extended Industrial 4
Supply Voltage VCC -0.3 6 V 4
Analog Input/Output Pins Voltage VI/O -0.3 V max is VCC + 0.3 (lower of VCC + 0.3 V or 6.0 V) 4
CCC Maximum Current ICCC(MAX) 70 A TA = 25°C 4
ESD HBM ESD -2 2 kV Human Body Model per JESD22-A114 4
ESD CDM ESD -0.5 0.5 kV Charged Device Model per JESD22-C101 4
Junction Temperature TJ -40 150 °C 4
Storage Temperature TSTG -65 155 °C 4
Lead Soldering Temperature TL 260 °C 10 seconds 4
Supply Current ICC 6 9 mA fBW = 1 MHz, no load, IP = 0 A 7
OUT Maximum Drive Capability IOUT -1 1 mA OUT covers 10% to 90% of VCC span 7
OUT Capacitive Load CL_OUT 100 pF 7
OUT Resistive Load RL_OUT 100 kΩ 7
OUT Voltage Linear Range VOUT 0.5 4.5 V VSIG_AC = ±2.00 V, VSIG_DC = +4.00 V 7
Power-On Time tON 100 200 µs VCC ≥ 2.50 V 7
Primary Conductor Resistance RIP 1 mΩ 7
Power Supply Rejection Ratio PSRR 35 dB 7
Sensitivity Power Supply Rejection Ratio SPSRR 35 dB 7
Offset Power Supply Rejection Ratio OPSRR 40 dB 7
Common Mode Field Rejection Ratio CMFRR -54 dB 7
Common Mode Field Rejection Ratio CMFRR 0.5 mA/G 7
Rise Time tRISE 200 ns IP = IRANGE(MAX), TA = 25°C, CL = 220 pF 7
Response Time tRESPONSE 300 ns IP = IRANGE(MAX), TA = 25°C, CL = 220 pF 7
Propagation Delay tDELAY 250 ns IP = IRANGE(MAX), TA = 25°C, CL = 220 pF 7
Undervoltage Lockout Rising VUVLO 2.5 V Rising VDD 7
Undervoltage Lockout Falling VUVLO 2.45 V Falling VDD 7
UVLO Hysteresis VUV_HYS 50 mV 7
Current Range IRANGE -20 20 A 11
Voltage Output Quiescent VOQ 2.495 2.5 2.505 V TA = 25°C, IP = 0 A 11
Total Output Error ETOT -1 1 % FS IP sweep from IP(MIN) to IP(MAX) 11
Sensitivity S 100 mV/A IRANGE(MIN) < IP < IRANGE(MAX) 11
Bandwidth fBW 1 MHz Small Signal = -3 dB 11
Noise eN 10 mARMS TA = 25°C, fBW = 100 kHz 11
Linearity Error ELIN 0.2 % FS IP = IP(MAX), TA = -40°C to 125°C; printed ±0.2 11
Sensitivity Error 25°C ESENS 0.5 % IP = IP(MAX), TA = 25°C; printed ±0.5 11
Sensitivity Error 125°C ESENS 1.9 % IP = IP(MAX), TA = 125°C; printed ±1.9 11
Sensitivity Error -40°C ESENS 2.1 % IP = IP(MAX), TA = -40°C; printed ±2.1 11
Offset Voltage Error 25°C VOE 5 mV IP = 0 A, TA = 25°C; printed ±5 11
Offset Voltage Error 125°C VOE 17 mV IP = 0 A, TA = 125°C; printed ±17 11
Offset Voltage Error -40°C VOE 23 mV IP = 0 A, TA = -40°C; printed ±23 11
Total Error Including Lifetime Drift ETOT(DRIFT) 1.6 % FS IP = IP(MAX), TA = -40°C to 125°C; printed ±1.6 11
Sensitivity Error Including Lifetime Drift ESENS(DRIFT) 2.7 % IP = IP(MAX), TA = -40°C to 125°C; printed ±2.7 11
Offset Voltage Error Including Lifetime Drift VOE(DRIFT) 25 mV IP = 0 A, TA = -40°C to 125°C; printed ±25 11

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper CCC pins be connected to as much copper area as possible. It is 21

CAD (KiCad official)

  • Symbol: CT425-HSN820MR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ct425-hsn820mr-etched.step / ct425-hsn820mr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ct425-hsn820mr.step / ct425-hsn820mr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Allegro MicroSystems, LLC datasheet (26 pp, sha256 243dacc9791f008c, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF