ICL7665SIBAZ from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OUT1	output	Open-drain N-channel output of comparator 1 (ON when VSET1 > 1.3V), sinks up to 20mA with absolute maximum 25mA and 18V.
2	HYST1	output	Open-drain P-channel hysteresis output of detector 1 (ON when VSET1 > 1.3V) that shorts or parallels the hysteresis resistor, sourcing up to -25mA maximum.
3	SET1	input	Comparator 1 input compared against the internal 1.3V bandgap reference (trip 1.20 to 1.40V for ICL7665S), with very high input impedance.
4	GND	power_in	Ground reference for the device; SET and OUT pins must stay within GND -0.3V to V+ +0.3V.
5	HYST2	output	Open-drain P-channel hysteresis output of detector 2 (ON when VSET2 > 1.3V), sourcing up to -25mA maximum.
6	SET2	input	Comparator 2 input compared against the internal 1.3V bandgap reference (trip 1.20 to 1.40V for ICL7665S), with very high input impedance.
7	OUT2	output	Open-drain N-channel output of comparator 2 (ON when VSET2 < 1.3V), sinks up to 20mA with absolute maximum 25mA and 18V.
8	V+	power_in	Positive supply, operating range 1.6V to 16V (1.8V to 16V over temperature), absolute maximum 18V.

Key specifications

Parameter	Value
Manufacturer	RENESAS
Package	SOIC-8
Category	Power Management ICs
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Operating Supply Voltage	V+	1.6		16	V	ICL7665S TA = +25°C	3
Operating Supply Voltage	V+	1.8		16	V	ICL7665S 0°C ≤ TA ≤ +70°C	3
Supply Current	I+		2.5	10	µA	-40°C ≤ TA ≤ +85°C, V+ = 2V, GND ≤ VSET1, VSET2 ≤ V+, all outputs open circuit	3
Supply Current	I+		2.6	10	µA	-40°C ≤ TA ≤ +85°C, V+ = 9V, GND ≤ VSET1, VSET2 ≤ V+, all outputs open circuit	3
Supply Current	I+		2.9	10	µA	-40°C ≤ TA ≤ +85°C, V+ = 15V, GND ≤ VSET1, VSET2 ≤ V+, all outputs open circuit	3
Input Trip Voltage 1	VSET1	1.2	1.3	1.4	V	ICL7665S	3
Input Trip Voltage 2	VSET2	1.2	1.3	1.4	V	ICL7665S	3
Output Leakage Current OUT	IOLK		10	200	nA	VSET = 0V or VSET ≥ 2V	4
Output Leakage Current HYST	IHLK		-10	-100	nA	VSET = 0V or VSET ≥ 2V	4
Output Leakage Current OUT	IOLK			2000	nA	V+ = 15V	4
Output Leakage Current HYST	IHLK			-500	nA	V+ = 15V	4
OUT1 Saturation Voltage	VOUT1		0.2	0.5	V	VSET1 = 2V, IOUT1 = 2mA, V+ = 2V	4
OUT1 Saturation Voltage	VOUT1		0.1	0.3	V	VSET1 = 2V, IOUT1 = 2mA, V+ = 5V	4
OUT1 Saturation Voltage	VOUT1		0.06	0.2	V	VSET1 = 2V, IOUT1 = 2mA, V+ = 15V	4
HYST1 Saturation Voltage	VHYST1		-0.15	-0.3	V	VSET1 = 2V, IHYST1 = -0.5mA, V+ = 2V	4
HYST1 Saturation Voltage	VHYST1		-0.05	-0.15	V	VSET1 = 2V, IHYST1 = -0.5mA, V+ = 5V	4
HYST1 Saturation Voltage	VHYST1		-0.02	-0.1	V	VSET1 = 2V, IHYST1 = -0.5mA, V+ = 15V	4
OUT2 Saturation Voltage	VOUT2		0.2	0.5	V	VSET2 = 0V, IOUT2 = 2mA, V+ = 2V	4
OUT2 Saturation Voltage	VOUT2		0.15	0.3	V	VSET2 = 0V, IOUT2 = 2mA, V+ = 5V	4
OUT2 Saturation Voltage	VOUT2		0.11	0.25	V	VSET2 = 0V, IOUT2 = 2mA, V+ = 15V	4
HYST2 Saturation Voltage	VHYST2		-0.25	-0.8	V	VSET2 = 2V, V+ = 2V, IHYST2 = -0.2mA	4
HYST2 Saturation Voltage	VHYST2		-0.43	-1	V	VSET2 = 2V, V+ = 5V, IHYST2 = -0.5mA	4
HYST2 Saturation Voltage	VHYST2		-0.35	-0.8	V	VSET2 = 2V, V+ = 15V, IHYST2 = -0.5mA	4
VSET Input Leakage Current	ISET		0.01	10	nA	GND ≤ VSET ≤ V+	4
Difference in Trip Voltages VSET1 - VSET2			5	50	mV	ROUT, RHYST = 1mW	4
Temperature Coefficient of VSET	ΔVSET/ΔT		200		ppm	ICL7665S	3
Supply Voltage Sensitivity of VSET1, VSET2	ΔVSET/ΔVS		0.03		%/V	ROUT1, ROUT2, RHYST1, RHYST2 = 1M, 2V ≤ V+ ≤ 10V	3
ΔVSET for Complete Output Change	ΔVSET		1		mV	ICL7665S, ROUT = 4.7k, RHYST = 20k, VOUTLO = 1% V+, VOUTHI = 99% V+	4
Output/Hysteresis Difference			1		mV	ROUT, RHYST = 1mW, ICL7665S	4
Output Delay Input Going HI	tSO1D		85		µs	VSET switched between 1.0V to 1.6V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Output Delay Input Going HI	tSH1D		90		µs	VSET switched between 1.0V to 1.6V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Output Delay Input Going HI	tSO2D		55		µs	VSET switched between 1.0V to 1.6V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Output Delay Input Going LO	tSO1D		75		µs	VSET switched between 1.6V to 1.0V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Output Delay Input Going LO	tSH1D		80		µs	VSET switched between 1.6V to 1.0V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Output Delay Input Going LO	tSO2D		60		µs	VSET switched between 1.6V to 1.0V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Output Rise Time	tO1R		0.6		µs	VSET switched between 1.0V to 1.6V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Output Rise Time	tO2R		0.8		µs	VSET switched between 1.0V to 1.6V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Output Rise Time	tH1R		7.5		µs	VSET switched between 1.0V to 1.6V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Output Rise Time	tH2R		0.7		µs	VSET switched between 1.0V to 1.6V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Output Fall Time	tO1F		0.6		µs	VSET switched between 1.0V to 1.6V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Output Fall Time	tO2F		0.7		µs	VSET switched between 1.0V to 1.6V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Output Fall Time	tH1F		4		µs	VSET switched between 1.0V to 1.6V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Output Fall Time	tH2F		1.8		µs	VSET switched between 1.0V to 1.6V, ROUT = 4.7k, CL = 12pF, RHYST = 20k	5
Supply Voltage	V+	-0.3		18	V		3
Output Voltages OUT1 and OUT2		-0.3		18	V	with respect to GND	3
Output Voltages HYST1 and HYST2		-0.3		18	V	with respect to V+	3
Maximum Sink Output Current OUT1 and OUT2				25	mA		3
Maximum Source Output Current HYST1 and HYST2				-25	mA		3
Operating Temperature Range ICL7665SI	TA	-40		85	°C		3
Maximum Junction Temperature (Plastic)	TJ			150	°C		3
Storage Temperature Range	Tstg	-65		150	°C		3
Maximum Lead Temperature (Soldering 10s)				300	°C	SOIC - lead tips only	3
Thermal Resistance Junction to Ambient	θJA		160		°C/W	SOIC package, typical	3

CAD (KiCad official)

Symbol: ICL7665SIBAZ
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: icl7665sibaz-etched.step / icl7665sibaz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); icl7665sibaz.step / icl7665sibaz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: RENESAS datasheet (15 pp, sha256 fa74ffb22df27bde, retrieved 2026-10-31, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

ICL7665SIBAZ

Verified ICL7665SIBAZ

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3D Model

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