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STM32L431VCT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32l431vct6factory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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STM32L431VCT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32L431VCT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional GPIO port E pin 2, 5V tolerant input/output, supports trace clock and SAI alternate functions.
2 PE3 bidirectional GPIO port E pin 3, 5V tolerant input/output, supports trace data and SAI alternate functions.
3 PE4 bidirectional GPIO port E pin 4, 5V tolerant input/output, supports trace data and SAI alternate functions.
4 PE5 bidirectional GPIO port E pin 5, 5V tolerant input/output, supports trace data and SAI alternate functions, RTC_TAMP3 and WKUP3.
5 PE6 bidirectional GPIO port E pin 6, 5V tolerant input/output, supports trace data and SAI alternate functions.
6 VBAT power_in Backup battery supply input for RTC and 32x32-bit backup registers, 1.55-3.6V, operates independently during low-power modes.
7 PC13 bidirectional GPIO port C pin 13, 5V tolerant input/output with limited current (3 mA max through power switch), RTC wakeup and tamper functions.
8 PC14-OSC32_IN bidirectional GPIO port C pin 14 / 32 kHz oscillator input, 5V tolerant, configurable for RTC external clock source.
9 PC15-OSC32_OUT bidirectional GPIO port C pin 15 / 32 kHz oscillator output, 5V tolerant, provides buffered clock to external circuits.
10 VSS power_in Ground pin, must be connected to external ground with main power supply and bypass capacitor.
11 VDD power_in Main 3.3V power supply input, 1.71-3.6V, requires 100 nF bypass capacitor placed close to pin.
12 PH0-OSC_IN bidirectional GPIO port H pin 0 / main oscillator input, 5V tolerant, accepts 4-48 MHz crystal or external clock.
13 PH1-OSC_OUT bidirectional GPIO port H pin 1 / main oscillator output, 5V tolerant, drives resonator for crystal oscillator circuit.
14 NRST input System reset pin with embedded weak pull-up resistor, triggers MCU reset when driven low, active low.
15 PC0 bidirectional GPIO port C pin 0, 5V tolerant with analog switch, supports LPTIM1, I2C3, LPUART1, and ADC1_IN1 functions.
16 PC1 bidirectional GPIO port C pin 1, 5V tolerant with analog switch, supports LPTIM1, I2C3, LPUART1, and ADC1_IN2 functions.
17 PC2 bidirectional GPIO port C pin 2, 5V tolerant with analog switch, supports LPTIM1, SPI2, and ADC1_IN3 functions.
18 PC3 bidirectional GPIO port C pin 3, 5V tolerant with analog switch, supports LPTIM1, SPI2, SAI1, and ADC1_IN4 functions.
19 VSSA power_in Analog ground pin for ADC/DAC/OPAMP/COMP, must be connected to main ground with 100 nF bypass capacitor.
20 VREF- power_in Negative reference voltage pin for ADC, typically connected to VSSA or 0V, affects ADC conversion accuracy.
21 VREF+ power_in Positive reference voltage pin for ADC, 2V to VDDA, requires 1 µF plus 100 nF bypass capacitors, supports VREFBUF output.
22 VDDA power_in Analog power supply input 1.62-3.6V, powers ADC, DAC, OPAMP, COMP, and VREFBUF, requires independent filtering.
23 PA0 bidirectional GPIO port A pin 0, 5V tolerant with analog switch, supports TIM2, USART2, COMP, SAI1, ADC1_IN5, RTC_TAMP2, and WKUP1.
24 PA1 bidirectional GPIO port A pin 1, 5V tolerant with analog switch, supports TIM2, I2C1, SPI1, USART2, TIM15, and ADC1_IN6.
25 PA2 bidirectional GPIO port A pin 2, 5V tolerant with analog switch, supports TIM2, USART2, LPUART1, QUADSPI, COMP2, TIM15, ADC1_IN7, WKUP4.
26 PA3 bidirectional GPIO port A pin 3, 3.6V tolerant with analog switch, supports TIM2, USART2, LPUART1, QUADSPI, SAI1, TIM15, ADC1_IN8.
27 VSS power_in Ground pin, must be connected to external ground with main power supply and bypass capacitor.
28 VDD power_in Main 3.3V power supply input, 1.71-3.6V, requires 100 nF bypass capacitor placed close to pin.
29 PA4 bidirectional GPIO port A pin 4, 3.6V tolerant with analog switch, supports SPI1, SPI3, USART2, SAI1, LPTIM2, DAC1_OUT1, ADC1_IN9.
30 PA5 bidirectional GPIO port A pin 5, 3.6V tolerant with analog switch, supports TIM2, SPI1, LPTIM2, DAC1_OUT2, ADC1_IN10.
31 PA6 bidirectional GPIO port A pin 6, 5V tolerant with analog switch, supports TIM1, SPI1, COMP1, USART3, LPUART1, QUADSPI, TIM16, ADC1_IN11.
32 PA7 bidirectional GPIO port A pin 7, 5V tolerant with analog switch and Fm+ capable, supports TIM1, I2C3, SPI1, QUADSPI, COMP2, ADC1_IN12.
33 PC4 bidirectional GPIO port C pin 4, 5V tolerant with analog switch, supports USART3 and ADC1_IN13 functions.
34 PC5 bidirectional GPIO port C pin 5, 5V tolerant with analog switch, supports USART3, ADC1_IN14, COMP1_INP, and WKUP5.
35 PB0 bidirectional GPIO port B pin 0, 5V tolerant with analog switch, supports TIM1, SPI1, USART3, QUADSPI, COMP1, SAI1, ADC1_IN15.
36 PB1 bidirectional GPIO port B pin 1, 5V tolerant with analog switch, supports TIM1, USART3, LPUART1, QUADSPI, LPTIM2, ADC1_IN16.
37 PB2 bidirectional GPIO port B pin 2, 5V tolerant with analog switch, supports RTC_OUT, LPTIM1, I2C3 SMBA, and COMP1_INP.
38 PE7 bidirectional GPIO port E pin 7, 5V tolerant input/output, supports TIM1 and SAI1 alternate functions.
39 PE8 bidirectional GPIO port E pin 8, 5V tolerant input/output, supports TIM1 and SAI1 alternate functions.
40 PE9 bidirectional GPIO port E pin 9, 5V tolerant input/output, supports TIM1 and SAI1 alternate functions.
41 PE10 bidirectional GPIO port E pin 10, 5V tolerant input/output, supports TIM1, TSC_G5_IO1, QUADSPI, and SAI1 alternate functions.
42 PE11 bidirectional GPIO port E pin 11, 5V tolerant input/output, supports TIM1, TSC_G5_IO2, and QUADSPI alternate functions.
43 PE12 bidirectional GPIO port E pin 12, 5V tolerant input/output, supports TIM1, SPI1, TSC_G5_IO3, and QUADSPI alternate functions.
44 PE13 bidirectional GPIO port E pin 13, 5V tolerant input/output, supports TIM1, SPI1, TSC_G5_IO4, and QUADSPI alternate functions.
45 PE14 bidirectional GPIO port E pin 14, 5V tolerant input/output, supports TIM1, SPI1, COMP2, and QUADSPI alternate functions.
46 PE15 bidirectional GPIO port E pin 15, 5V tolerant input/output, supports TIM1, SPI1, COMP1, and QUADSPI alternate functions.
47 PB10 bidirectional GPIO port B pin 10, 5V tolerant Fm+ capable input/output, supports TIM2, I2C2, SPI2, USART3, LPUART1, QUADSPI, COMP1, SAI1.
48 PB11 bidirectional GPIO port B pin 11, 5V tolerant Fm+ capable input/output, supports TIM2, I2C2, USART3, LPUART1, QUADSPI, COMP2.
49 VSS power_in Ground pin, must be connected to external ground with main power supply and bypass capacitor.
50 VDD power_in Main 3.3V power supply input, 1.71-3.6V, requires 100 nF bypass capacitor placed close to pin.
51 PB12 bidirectional GPIO port B pin 12, 5V tolerant input/output, supports TIM1, I2C2, SPI2, USART3, LPUART1, TSC_G1_IO1, SWPMI1, SAI1, TIM15.
52 PB13 bidirectional GPIO port B pin 13, 5V tolerant Fm+ capable input/output, supports TIM1, I2C2, SPI2, USART3, LPUART1, TSC_G1_IO2, SWPMI1, SAI1.
53 PB14 bidirectional GPIO port B pin 14, 5V tolerant Fm+ capable input/output, supports TIM1, I2C2, SPI2, USART3, TSC_G1_IO3, SWPMI1, SAI1, TIM15.
54 PB15 bidirectional GPIO port B pin 15, 5V tolerant input/output, supports RTC_REFIN, TIM1, SPI2, TSC_G1_IO4, SWPMI1, SAI1, TIM15.
55 PD8 bidirectional GPIO port D pin 8, 5V tolerant input/output, supports USART3 alternate function.
56 PD9 bidirectional GPIO port D pin 9, 5V tolerant input/output, supports USART3 alternate function.
57 PD10 bidirectional GPIO port D pin 10, 5V tolerant input/output, supports USART3, TSC_G6_IO1 alternate functions.
58 PD11 bidirectional GPIO port D pin 11, 5V tolerant input/output, supports USART3, TSC_G6_IO2, LPTIM2 alternate functions.
59 PD12 bidirectional GPIO port D pin 12, 5V tolerant input/output, supports USART3, TSC_G6_IO3, LPTIM2 alternate functions.
60 PD13 bidirectional GPIO port D pin 13, 5V tolerant input/output, supports TSC_G6_IO4, LPTIM2 alternate functions.
61 PD14 bidirectional GPIO port D pin 14, 5V tolerant input/output, EVENTOUT alternate function only.
62 PD15 bidirectional GPIO port D pin 15, 5V tolerant input/output, EVENTOUT alternate function only.
63 PC6 bidirectional GPIO port C pin 6, 5V tolerant input/output, supports TSC_G4_IO1, SDMMC1_D6 alternate functions.
64 PC7 bidirectional GPIO port C pin 7, 5V tolerant input/output, supports TSC_G4_IO2, SDMMC1_D7 alternate functions.
65 PC8 bidirectional GPIO port C pin 8, 5V tolerant input/output, supports TSC_G4_IO3, SDMMC1_D0 alternate functions.
66 PC9 bidirectional GPIO port C pin 9, 5V tolerant input/output, supports TSC_G4_IO4, SDMMC1_D1 alternate functions.
67 PA8 bidirectional GPIO port A pin 8, 5V tolerant input/output, supports MCO, TIM1, USART1, SWPMI1, SAI1, LPTIM2 alternate functions.
68 PA9 bidirectional GPIO port A pin 9, 5V tolerant Fm+ capable input/output, supports TIM1, I2C1, USART1, SAI1, TIM15 alternate functions.
69 PA10 bidirectional GPIO port A pin 10, 5V tolerant Fm+ capable input/output, supports TIM1, I2C1, USART1, SAI1 alternate functions.
70 PA11 bidirectional GPIO port A pin 11, 5V tolerant input/output, supports TIM1, SPI1, COMP1, USART1, CAN1_RX alternate functions.
71 PA12 bidirectional GPIO port A pin 12, 5V tolerant input/output, supports TIM1, SPI1, USART1, CAN1_TX alternate functions.
72 PA13 bidirectional GPIO port A pin 13 / JTAG TMS / Serial Wire Debug I/O, 5V tolerant, internal pull-up after reset, debug port shared with alternate functions.
73 VDD power_in Main 3.3V power supply input, 1.71-3.6V, requires 100 nF bypass capacitor placed close to pin.
74 VSS power_in Ground pin, must be connected to external ground with main power supply and bypass capacitor.
75 VDD power_in Main 3.3V power supply input, 1.71-3.6V, requires 100 nF bypass capacitor placed close to pin.
76 PA14 bidirectional GPIO port A pin 14 / JTAG TCK / Serial Wire Debug Clock, 5V tolerant, internal pull-down after reset, debug port shared with alternate functions.
77 PA15 bidirectional GPIO port A pin 15 / JTAG TDI, 5V tolerant, internal pull-up after reset, supports TIM2, USART2, SPI1, SPI3, USART3, TSC_G3_IO1, SWPMI1.
78 PC10 bidirectional GPIO port C pin 10, 5V tolerant input/output, supports SPI3, USART3, TSC_G3_IO2, SDMMC1_D2 alternate functions.
79 PC11 bidirectional GPIO port C pin 11, 5V tolerant input/output, supports SPI3, USART3, TSC_G3_IO3, SDMMC1_D3 alternate functions.
80 PC12 bidirectional GPIO port C pin 12, 5V tolerant input/output, supports SPI3, USART3, TSC_G3_IO4, SDMMC1_CK alternate functions.
81 PD0 bidirectional GPIO port D pin 0, 5V tolerant input/output, supports SPI2_NSS, CAN1_RX alternate functions.
82 PD1 bidirectional GPIO port D pin 1, 5V tolerant input/output, supports SPI2_SCK, CAN1_TX alternate functions.
83 PD2 bidirectional GPIO port D pin 2, 5V tolerant input/output, supports USART3, TSC_SYNC, SDMMC1_CMD alternate functions.
84 PD3 bidirectional GPIO port D pin 3, 5V tolerant input/output, supports SPI2, USART2, QUADSPI alternate functions.
85 PD4 bidirectional GPIO port D pin 4, 5V tolerant input/output, supports SPI2, USART2, QUADSPI alternate functions.
86 PD5 bidirectional GPIO port D pin 5, 5V tolerant input/output, supports USART2, QUADSPI alternate functions.
87 PD6 bidirectional GPIO port D pin 6, 5V tolerant input/output, supports USART2, QUADSPI, SAI1 alternate functions.
88 PD7 bidirectional GPIO port D pin 7, 5V tolerant input/output, supports USART2, QUADSPI alternate functions.
89 PB3 bidirectional GPIO port B pin 3 / JTAG TDO / Trace Serial Wire Output, 5V tolerant with analog switch, internal pull-up after reset, debug port shared with alternate functions.
90 PB4 bidirectional GPIO port B pin 4 / JTAG NTRST, 5V tolerant with analog switch and Fm+ capable, internal pull-up after reset, supports I2C3, SPI1, SPI3, USART1, TSC_G2_IO1, SAI1.
91 PB5 bidirectional GPIO port B pin 5, 5V tolerant input/output, supports LPTIM1, I2C1, SPI1, SPI3, USART1, TSC_G2_IO2, COMP2, SAI1, TIM16.
92 PB6 bidirectional GPIO port B pin 6, 5V tolerant with analog switch and Fm+ capable input/output, supports LPTIM1, I2C1, USART1, TSC_G2_IO3, SAI1, TIM16.
93 PB7 bidirectional GPIO port B pin 7, 5V tolerant with analog switch and Fm+ capable input/output, supports LPTIM1, I2C1, USART1, TSC_G2_IO4, COMP2_INM, PVD_IN.
94 PH3/BOOT0 bidirectional GPIO port H pin 3 / Boot configuration pin, 5V tolerant input/output, selects boot from flash (low) or system memory (high) during reset.
95 PB8 bidirectional GPIO port B pin 8, 5V tolerant Fm+ capable input/output, supports I2C1, CAN1_RX, SDMMC1_D4, SAI1, TIM16 alternate functions.
96 PB9 bidirectional GPIO port B pin 9, 5V tolerant Fm+ capable input/output, supports IR_OUT, I2C1, SPI2, CAN1_TX, SDMMC1_D5, SAI1 alternate functions.
97 PE0 bidirectional GPIO port E pin 0, 5V tolerant input/output, supports TIM16 alternate function.
98 PE1 bidirectional GPIO port E pin 1, 5V tolerant input/output, EVENTOUT alternate function only.
99 VSS power_in Ground pin, must be connected to external ground with main power supply and bypass capacitor.
100 VDD power_in Main 3.3V power supply input, 1.71-3.6V, requires 100 nF bypass capacitor placed close to pin.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32L431VCT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32l431vct6-etched.step / stm32l431vct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l431vct6.step / stm32l431vct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (208 pp, sha256 71963de3cb899f8f, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF