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PGA2320IDWR
Public Made by Adomby adom
Texas Instruments Audio Amplifiers, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPGA2320IDWR
Texas Instruments · Audio Amplifiers · SOIC-16-300mil
PGA2320IDWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ZCEN | input | Zero Crossing Enable input (active high): zero crossing detection is disabled when ZCEN is low and enabled when it is high. |
| 2 | CS | input | Chip-select input (active low): data may be written to the PGA2320 only when CS is low. |
| 3 | SDI | input | Serial data input: a 16-bit control word (8 bits each for left and right gain, MSB first) is latched on the rising edge of SCLK. |
| 4 | VD+ | power_in | Digital power supply, +5V. |
| 5 | DGND | power_in | Digital ground. |
| 6 | SCLK | input | Serial clock input: SDI is latched on the rising edge of SCLK and SDO transitions on the falling edge. |
| 7 | SDO | tri_state | Serial data output used for daisy-chaining; it is a tristate output that assumes a high-impedance state when CS is high. |
| 8 | MUTE | input | Mute control input, active low: when low, each channel is muted following the next zero crossing or timeout on that channel. |
| 9 | VINR | input | Analog input, right channel, unbalanced and referenced to AGNDR; a source impedance above 600 Ω degrades distortion performance. |
| 10 | AGNDR | power_in | Analog ground, right channel. |
| 11 | VOUTR | output | Analog output, right channel. |
| 12 | VA+ | power_in | Analog power supply, +15V. |
| 13 | VA− | power_in | Analog power supply, −15V. |
| 14 | VOUTL | output | Analog output, left channel. |
| 15 | AGNDL | power_in | Analog ground, left channel. |
| 16 | VINL | input | Analog input, left channel, unbalanced and referenced to AGNDL; a source impedance above 600 Ω degrades distortion performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16-300mil |
| Category | Amplifiers/Comparators |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gain Error (Gain Setting = 31.5dB) | -0.1 | 0.1 | dB | Gain Setting = 31.5dB | 3 | ||
| Gain Matching | -0.1 | 0.1 | dB | 3 | |||
| Dynamic Range | 115 | 120 | dB | VIN = AGND, Gain = 0dB | 3 | ||
| THD+N | THD+N | 0.0003 | 0.001 | % | VIN = 10VPP, f = 1kHz | 3 | |
| Output Noise | 10.5 | 17.5 | µVRMS | VIN = AGND, Gain = 0dB | 3 | ||
| Offset Voltage (output buffer) | 1 | 7.5 | mV | VIN = AGND, Gain = 0dB | 3 | ||
| Low-Level Input Voltage | VIL | -0.3 | 0.8 | V | 3 | ||
| High-Level Input Voltage | VIH | 2 | V | 3 | |||
| Low-Level Output Voltage | VOL | 0.4 | V | IO = −2mA | 3 | ||
| Input Leakage Current | 1 | 10 | µA | 3 | |||
| Serial Clock (SCLK) Frequency | tSCLK | 0 | 6.25 | MHz | 3 | ||
| Quiescent Current IA+ | IA+ | 11 | 16 | mA | VA+ = +15V | 3 | |
| Quiescent Current IA− | IA− | 11 | 16 | mA | VA− = −15V | 3 | |
| Quiescent Current ID+ | ID+ | 0.6 | 1.5 | mA | VD+ = +5V | 3 | |
| Operating Voltage VA+ | VA+ | 4.5 | 15 | 15.5 | V | 3 | |
| Operating Voltage VA− | VA− | -4.5 | -15 | -15.5 | V | 3 | |
| Operating Voltage VD+ | VD+ | 4.5 | 5 | 5.5 | V | 3 | |
| Supply voltage VA+ (absolute maximum) | VA+ | 15.5 | V | 2 | |||
| Supply voltage VA− (absolute maximum) | VA− | -15.5 | V | 2 | |||
| Supply voltage VD+ (absolute maximum) | VD+ | 5.5 | V | 2 | |||
| Digital input voltage (absolute maximum) | -0.3 | V | 2 | ||||
| Operating temperature range | -40 | 85 | °C | Operating free-air temperature range | 2 | ||
| Storage temperature range | -65 | 150 | °C | 2 | |||
| Junction temperature | 150 | °C | 2 | ||||
| Lead temperature (soldering) | 300 | °C | Soldering, 10s | 2 | |||
| Package temperature (IR reflow) | 235 | °C | IR, reflow, 10s | 2 |
CAD (KiCad official)
- Symbol:
PGA2320IDWR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files:
pga2320idwr-etched.step/pga2320idwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pga2320idwr.step/pga2320idwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
80ac73530c548343, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).