component
DRV8323RHRGZT
Public Made by Adomby adom
Texas Instruments Brushless DC (BLDC) Motor Driver, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDRV8323RHRGZT
Texas Instruments · Brushless DC (BLDC) Motor Driver · VQFN-48-EP(7x7)
DRV8323RHRGZT from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Buck regulator feedback input for output voltage control via external resistor divider; input range 0-7V. |
| 2 | PGND | power_in | Device power ground and low-side gate driver return path; must be externally connected to AGND and BGND. |
| 3 | CPL | passive | Charge pump flying capacitor node; connect 47nF ceramic capacitor (VM-rated) between CPH and CPL. |
| 4 | CPH | passive | Charge pump flying capacitor node; connect 47nF ceramic capacitor (VM-rated) between CPH and CPL. |
| 5 | VCP | power_out | Charge pump output for high-side gate driver supply; connect 1µF ceramic capacitor (25V-rated) between VCP and VM. |
| 6 | VM | power_in | Gate driver power supply input rated for 6-60V operation; bypass with 0.1µF and ≥10µF capacitors to PGND. |
| 7 | VDRAIN | input | High-side MOSFET drain sense input for VDS overvoltage monitoring; voltage range -0.3V to 65V. |
| 8 | GHA | output | High-side gate driver output for A phase; connects to high-side MOSFET gate with ±1V referenced to SHA. |
| 9 | SHA | bidirectional | High-side source reference pin for A phase; provides VDS monitor input and gate driver sink current output for high-side MOSFET source. |
| 10 | GLA | output | Low-side gate driver output for A phase; connects to low-side MOSFET gate with 11V nominal output. |
| 11 | SPA | input | Low-side shunt amplifier positive input for A phase; supports bidirectional current sensing and VDS monitoring via resistor divider. |
| 12 | SNA | input | Current sense amplifier negative input for A phase; connect to shunt resistor low side or PGND if amplifier not used. |
| 13 | SNB | input | Current sense amplifier negative input for B phase; connect to shunt resistor low side or PGND if amplifier not used. |
| 14 | SPB | input | Low-side shunt amplifier positive input for B phase; supports bidirectional current sensing and VDS monitoring via resistor divider. |
| 15 | GLB | output | Low-side gate driver output for B phase; connects to low-side MOSFET gate with 11V nominal output. |
| 16 | SHB | bidirectional | High-side source reference pin for B phase; provides VDS monitor input and gate driver sink current output for high-side MOSFET source. |
| 17 | GHB | output | High-side gate driver output for B phase; connects to high-side MOSFET gate with ±1V referenced to SHB. |
| 18 | GHC | output | High-side gate driver output for C phase; connects to high-side MOSFET gate with ±1V referenced to SHC. |
| 19 | SHC | bidirectional | High-side source reference pin for C phase; provides VDS monitor input and gate driver sink current output for high-side MOSFET source. |
| 20 | GLC | output | Low-side gate driver output for C phase; connects to low-side MOSFET gate with 11V nominal output. |
| 21 | SPC | input | Low-side shunt amplifier positive input for C phase; supports bidirectional current sensing and VDS monitoring via resistor divider. |
| 22 | SNC | input | Current sense amplifier negative input for C phase; connect to shunt resistor low side or PGND if amplifier not used. |
| 23 | SOC | output | Current sense amplifier output for C phase with configurable gain (5/10/20/40V/V); output range 0.25-VREF+0.25V in dual-supply mode. |
| 24 | SOB | output | Current sense amplifier output for B phase with configurable gain (5/10/20/40V/V); output range 0.25-VREF+0.25V in dual-supply mode. |
| 25 | SOA | output | Current sense amplifier output for A phase with configurable gain (5/10/20/40V/V); output range 0.25-VREF+0.25V in dual-supply mode. |
| 26 | VREF | power_out | Current sense amplifier power supply and reference voltage input rated 3-5.5V; connect 0.1µF ceramic capacitor to AGND. |
| 27 | DGND | power_in | Device digital ground; must be externally connected to AGND and PGND per datasheet requirements. |
| 28 | nFAULT | tri_state | Open-drain fault indicator output pulled low during fault conditions; requires external pull-up resistor, maximum 5mA sink current. |
| 29 | MODE | input | PWM input mode selection via 4-level hardware resistor configuration for 6x/3x/1x/independent gate drive modes. |
| 30 | IDRIVE | input | Gate driver output current selection via 7-level hardware resistor configuration for 10mA-1A pull and 20mA-2A sink current range. |
| 31 | VDS | input | VDS over-current trip threshold selection via 7-level hardware resistor configuration for 0.06-1.88V threshold range. |
| 32 | GAIN | input | Current sense amplifier gain selection via 4-level hardware resistor configuration for 5V/V, 10V/V, 20V/V, or 40V/V gain modes. |
| 33 | ENABLE | input | Gate driver enable control input; logic low triggers low-power sleep mode; 8-40µs low pulse clears latched faults without sleep entry. |
| 34 | CAL | input | Current sense amplifier auto-offset calibration control; set high to execute 100µs automatic calibration routine on all three amplifiers. |
| 35 | AGND | power_in | Device analog ground; must be externally connected to BGND and PGND per datasheet requirements. |
| 36 | DVDD | power_out | 3.3V regulated output for analog circuits with maximum 30mA external load capability; connect 1µF ceramic capacitor to AGND. |
| 37 | INHA | input | High-side gate drive control input for A phase; controls GHA output state in 6x PWM mode per truth table. |
| 38 | INLA | input | Low-side gate drive control input for A phase; controls GLA output state in 6x PWM mode per truth table. |
| 39 | INHB | input | High-side gate drive control input for B phase; controls GHB output state in 6x PWM mode per truth table. |
| 40 | INLB | input | Low-side gate drive control input for B phase; controls GLB output state in 6x PWM mode per truth table. |
| 41 | INHC | input | High-side gate drive control input for C phase; controls GHC output state in 6x PWM mode per truth table. |
| 42 | INLC | input | Low-side gate drive control input for C phase; controls GLC output state in 6x PWM mode per truth table. |
| 43 | BGND | power_in | Buck regulator ground for integrated LMR16006 600mA converter; must be externally connected to AGND and PGND. |
| 44 | CB | power_in | Buck regulator bootstrap capacitor node; connect 0.1µF ceramic capacitor (16V-rated) between CB and SW pins for high-side gate drive bias. |
| 45 | SW | output | Buck converter switching node output for integrated 600mA buck regulator; connect to inductor, freewheeling diode, and CB bootstrap capacitor. |
| 46 | NC | unconnected | No internal connection; pin can be left floating or connected to system ground per application requirements. |
| 47 | VIN | power_in | Buck regulator power supply input rated for 4-60V operation; connect local bypass capacitor to BGND. |
| 48 | nSHDN | input | Buck regulator shutdown control input; pull below 1.25V to disable buck output, leave floating or connect to VIN to enable; high-voltage tolerant to 60V. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-48-EP(7x7) |
| Category | Motor Driver ICs |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
DRV8323RHRGZT - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
drv8323rhrgzt-etched.step/drv8323rhrgzt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);drv8323rhrgzt.step/drv8323rhrgzt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (95 pp, sha256
98e62c0c61f99755, retrieved 2026-10-03, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).