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ATF750CL-15XU

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Microchip Tech Programmable Logic Device (CPLDs/FPGAs), TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrolleratf750cl-15xufactory-2.0.0extractor-text

Verified ATF750CL-15XU

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 24 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATF750CL-15XU · TSSOP-24 · 24 pins
  • ✓copper: 24 copper pads, none touching another net
  • ✓datasheet: all 24 pin names found in the 25-page datasheet
  • ✓distributor: lcsc C619535, digikey ATF750CL-15XU-ND, mouser 556-AF750CL15XU
  • ✓family: TSSOP-24_4.4x7.8mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-9gl0p12d/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 24 pins = 24 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 24 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ atf750cl-15xu.kicad_sym✓ atf750cl-15xu.kicad_mod✓ atf750cl-15xu.step
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Contents

README

markdown

ATF750CL-15XU

Microchip Tech · Programmable Logic Device (CPLDs/FPGAs) · TSSOP-24

ATF750CL-15XU from Microchip Tech, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLK/IN input Clock input that can directly clock flip-flops (pin clocking) or be used as a logic input.
2 IN input Logic input to the array.
3 IN input Logic input to the array.
4 IN input Logic input to the array.
5 IN input Logic input to the array.
6 IN input Logic input to the array.
7 IN input Logic input to the array.
8 IN input Logic input to the array.
9 IN input Logic input to the array.
10 IN input Logic input to the array.
11 IN input Logic input to the array.
12 GND power_in Ground.
13 IN input Logic input to the array.
14 I/O bidirectional Bi-directional buffer usable as input, output or I/O, with its own output enable product term.
15 I/O bidirectional Bi-directional buffer usable as input, output or I/O, with its own output enable product term.
16 I/O bidirectional Bi-directional buffer usable as input, output or I/O, with its own output enable product term.
17 I/O bidirectional Bi-directional buffer usable as input, output or I/O, with its own output enable product term.
18 I/O bidirectional Bi-directional buffer usable as input, output or I/O, with its own output enable product term.
19 I/O bidirectional Bi-directional buffer usable as input, output or I/O, with its own output enable product term.
20 I/O bidirectional Bi-directional buffer usable as input, output or I/O, with its own output enable product term.
21 I/O bidirectional Bi-directional buffer usable as input, output or I/O, with its own output enable product term.
22 I/O bidirectional Bi-directional buffer usable as input, output or I/O, with its own output enable product term.
23 I/O bidirectional Bi-directional buffer usable as input, output or I/O, with its own output enable product term.
24 VCC power_in +5V supply (5V ±10% for industrial range).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TSSOP-24
Category Single Chip Microcomputer/Microcontroller
Pins 24

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Load Current ILI 10 µA VIN = -0.1V to VCC + 1V 6
Output Leakage Current ILO 10 µA VOUT = -0.1V to VCC + 0.1V 6
Power Supply Current, Standby (CL-15, Ind.) ICC 0.15 2 mA VCC = Max, VIN = Max, Outputs Open 6
Output Short Circuit Current IOS -120 mA VOUT = 0.5V 6
Input Low Voltage VIL -0.6 0.8 V 4.5 ≤ VCC ≤ 5.5V 6
Output Low Voltage VOL 0.5 V VIN = VIH or VIL, VCC = Min, IOL = 16 mA Com., Ind. 6
Output High Voltage VOH 2.4 V VIN = VIH or VIL, VCC = Min, IOH = -4.0 mA 6
Input or Feedback to Non-registered Output (product term clock) tPD 15 ns C/CL-15 7
Input to Output Enable tEA 15 ns C/CL-15, product term clock 7
Input to Output Disable tER 15 ns C/CL-15, product term clock 7
Clock to Output tCO 5 12 ns C/CL-15, product term clock 7
Clock to Feedback tCF 5 9 ns C/CL-15, product term clock 7
Feedback Setup Time tSF 7 ns C/CL-15, product term clock 7
Hold Time tH 5 ns C/CL-15, product term clock 7
Clock Period tP 14 ns C/CL-15, product term clock 7
Clock Width tW 7 ns C/CL-15, product term clock 7
Asynchronous Reset Width tAW 15 ns C/CL-15, product term clock 7
Asynchronous Reset Recovery Time tAR 15 ns C/CL-15, product term clock 7
Asynchronous Reset to Registered Output Reset tAP 15 ns C/CL-15, product term clock 7
Setup Time, Synchronous Preset tSP 8 ns C/CL-15, product term clock 7
fMAX Internal Feedback fMAX 62 MHz 1/(tSF + tCF), product term clock 7
fMAX No Feedback fMAX 71 MHz 1/(tP), product term clock 7
Clock to Output (input pin clock) tCOS 0 10 ns C/CL-15, input pin clock 8
Clock to Feedback (input pin clock) tCFS 0 5.5 ns C/CL-15, input pin clock 8
Feedback Setup Time (input pin clock) tSFS 7 ns C/CL-15, input pin clock 8
Hold Time (input pin clock) tHS 0 ns C/CL-15, input pin clock 8
Clock Period (input pin clock) tPS 12 ns C/CL-15, input pin clock 8
Clock Width (input pin clock) tWS 6 ns C/CL-15, input pin clock 8
Asynchronous Reset Recovery Time (input pin clock) tARS 15 ns C/CL-15, input pin clock 8
Asynchronous Reset to Registered Output Reset (input pin clock) tAP 15 ns C/CL-15, input pin clock 8
fMAXS Internal Feedback fMAXS 80 MHz 1/(tSFS + tCFS), input pin clock 8
fMAXS No Feedback fMAXS 83 MHz 1/(tPS), input pin clock 8
Power-up Reset Time tPR 600 1000 ns 11
Power-up Reset Voltage VRST 2 4.5 V 11
Input Capacitance CIN 5 8 pF VIN = 0V, f = 1 MHz, T = 25°C 11
Output Capacitance COUT 6 8 pF VOUT = 0V, f = 1 MHz, T = 25°C 11
Operating Temperature (Ambient), Industrial -40 85 °C Industrial 3
Temperature Under Bias -55 125 °C 3
Storage Temperature -65 150 °C 3
Voltage on Any Pin with Respect to Ground -2 7 V 3
Voltage on Input Pins with Respect to Ground During Programming -2 14 V 3
Programming Voltage with Respect to Ground -2 14 V 3

CAD (KiCad official)

  • Symbol: ATF750CL-15XU
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: atf750cl-15xu-etched.step / atf750cl-15xu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atf750cl-15xu.step / atf750cl-15xu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (25 pp, sha256 bcc670905eb72135, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF