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AP2120N-3.2TRG1

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Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)ap2120n-3.2trg1factory-2.0.0extractor-text

Verified AP2120N-3.2TRG1

by Ray · last 12 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

12 Nov 2026RayPublished by the parts factory: tier mfr, 3 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AP2120N-3.2TRG1 · SOT-23 · 3 pins
  • ✓copper: 3 copper pads, none touching another net
  • ✓datasheet: all 3 pin names found in the 19-page datasheet
  • ✓distributor: lcsc C6500828, digikey AP2120N-3.2TRG1-ND, mouser 621-AP2120N-3.2TRG1
  • ✓family: SOT-23
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-9njw5bso/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.17)
  • ✓pads: 3 pins = 3 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 3 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 17 kB, viewers/symbol.html 7 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ap2120n-3-2trg1.kicad_sym✓ ap2120n-3-2trg1.kicad_mod✓ ap2120n-3-2trg1.step
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

markdown

AP2120N-3.2TRG1

Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23

AP2120N-3.2TRG1 from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin; the datasheet gives no electrical limits for this pin beyond its function as ground.
2 VOUT power_out Regulated output voltage; the datasheet requires an output capacitor of more than 1µF with ESR from 0.01Ω to 100Ω for stability, with ceramic capacitors recommended.
3 VIN power_in Input voltage pin, specified at 2V minimum to 6V maximum, and requires a 1µF input filter capacitor.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-23
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage VOUT 3.136 3.2 3.264 V VIN = 4.2V, 1mA ≤ IOUT ≤ 30mA 11
Input Voltage VIN 6 V 11
Output Current IOUT 150 mA VIN-VOUT = 1V 11
Load Regulation VRLOAD 12 40 mV VIN = 4.2V, 1mA ≤ IOUT ≤ 80mA 11
Line Regulation VRLINE 4 16 mV 3.7V ≤ VIN ≤ 6V, IOUT = 30mA 11
Dropout Voltage VDROP 20 40 mV IOUT = 10mA 11
Dropout Voltage VDROP 200 300 mV IOUT = 100mA 11
Dropout Voltage VDROP 300 500 mV IOUT = 150mA 11
Quiescent Current IQ 25 50 µA VIN = 4.2V, IOUT = 0mA 11
Power Supply Rejection Ratio PSRR 65 dB Ripple 0.5Vp-p, f = 1kHz, VIN = 4.2V 11
Output Voltage Temperature Coefficient ∆VOUT/∆T -320 320 µV/°C IOUT = 30mA 11
Output Voltage Temperature Coefficient (∆VOUT/VOUT)/∆T -100 100 ppm/°C 11
Short Current Limit ILIMIT 50 mA VOUT = 0V 11
RMS Output Noise VNOISE 30 µVrms TA = +25°C, 10Hz ≤ f ≤ 100kHz 11
Input Voltage VIN 6.5 V 3
Enable Input Voltage VCE -0.3 V Upper limit printed as VIN +0.3 V 3
Output Current IOUT 300 mA 3
Junction Temperature TJ 150 °C 3
Storage Temperature Range TSTG -65 150 °C 3
Lead Temperature TLEAD 260 °C Soldering, 10s 3
Thermal Resistance (Junction to Ambient) θJA 250 °C/W SOT-23 3
ESD (Human Body Model) ESD 2000 V Human Body Model 3
ESD (Machine Model) ESD 200 V Machine Model 3
Input Voltage VIN 2 6 V 3
Operating Junction Temperature Range TJ -40 85 °C 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin • Terminals: Finish - Mate Tin Plated Leads, Solderable per MIL￾STD-202, Method 208 • Weight: 0.009 grams (Approximate) 1

CAD (KiCad official)

  • Symbol: AP2120N-3.2TRG1
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.0 mm tall, datasheet A, midpoint of min and max). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
  • 3D model files: ap2120n-3-2trg1-etched.step / ap2120n-3-2trg1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ap2120n-3-2trg1.step / ap2120n-3-2trg1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (19 pp, sha256 66be4c8fbb47afd5, retrieved 2026-11-12, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF