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TLV62090RGTT
Public Made by Adomby adom
Texas Instruments DC-DC Converters, QFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV62090RGTT
Texas Instruments · DC-DC Converters · QFN-16-EP(3x3)
TLV62090RGTT from Texas Instruments, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | bidirectional | Switch pin of the power stage (datasheet classifies it as I/O); pins 1 and 2 are both SW. |
| 2 | SW | bidirectional | Switch pin of the power stage (datasheet classifies it as I/O); pins 1 and 2 are both SW. |
| 3 | DEF | input | Used for internal logic and needs to be pulled high; it should not be left floating. |
| 4 | PG | output | Open-drain power good output that is high impedance when the output is within regulation and pulled low when below nominal; the pull-up resistor must not be connected to any voltage higher than the device input voltage. |
| 5 | FB | input | Feedback pin; connect a resistor divider to set the output voltage. |
| 6 | AGND | power_in | Analog ground; the exposed thermal pad is connected to AGND. |
| 7 | CP | bidirectional | Internal charge pump flying capacitor; connect a 10 nF capacitor between CP and CN. |
| 8 | CN | bidirectional | Internal charge pump flying capacitor; connect a 10 nF capacitor between CP and CN. |
| 9 | SS | input | Soft-start control pin; a capacitor on this pin sets the soft-start time, and leaving it floating sets the minimum start-up time. |
| 10 | AVIN | power_in | Bias supply input voltage pin. |
| 11 | PVIN | power_in | Power supply input voltage pin; input voltage range is 2.5 V to 5.5 V. |
| 12 | PVIN | power_in | Power supply input voltage pin; input voltage range is 2.5 V to 5.5 V. |
| 13 | EN | input | Device enable; must be pulled high to enable the device and pulled low to disable it, with an internal pull-down of typically 400 kΩ active when EN is low. |
| 14 | PGND | power_in | Power ground connection. |
| 15 | PGND | power_in | Power ground connection. |
| 16 | VOS | input | Output voltage sense pin; must be connected to the output voltage. |
| 17 | Exposed Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-16-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage range PVIN, AVIN, FB, SS, EN, DEF, VOS | -0.3 | 7 | V | 5 | |||
| Voltage range SW (DC), PG | -0.3 | V | 5 | ||||
| Voltage range SW (AC, less than 10 ns) | -3 | 10 | V | less than 10 ns | 5 | ||
| Voltage range CN, CP | -0.3 | V | 5 | ||||
| Power Good sink current | PG | 1 | mA | 5 | |||
| Operating junction temperature range | TJ | -40 | 150 | °C | 5 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Input voltage range | VIN | 2.5 | 5.5 | V | 5 | ||
| Operating ambient temperature | TA | -40 | 85 | °C | 5 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 5 | ||
| Input voltage range | VIN | 2.5 | 5.5 | V | 6 | ||
| Shutdown current | Isd | 0.6 | 5 | µA | Into PVIN and AVIN | 6 | |
| Undervoltage lockout threshold | VUVLO | 2.1 | 2.2 | 2.3 | V | VIN falling | 6 |
| Softstart current | ISS | 6.3 | 7.5 | 8.7 | µA | 6 | |
| Power good threshold, output voltage rising | VTH_PG | 93 | 95 | 97 | % | Output voltage rising | 6 |
| Power good threshold, output voltage falling | VTH_PG | 88 | 90 | 92 | % | Output voltage falling | 6 |
| Input leakage current (EN) | Ilkg | 10 | 100 | nA | EN = GND or VIN | 6 | |
| Leakage current (PG) | Ilkg | 10 | 100 | nA | VPG = 3.6 V | 6 | |
| High side FET switch current limit | ILIMF | 3.7 | 4.6 | 5.5 | A | 6 | |
| Output voltage range | VOUT | 0.8 | V | 6 | |||
| Feedback voltage accuracy (PWM, TJ = 25°C) | VFB | -1 | 1 | % | VIN ≥ VOUT + 1 V; IOUT = 1 A, PWM mode, TJ = 25°C | 6 | |
| Feedback voltage accuracy (PWM) | VFB | -1.4 | 1.4 | % | VIN ≥ VOUT + 1 V; IOUT = 1 A, PWM mode | 6 | |
| Feedback voltage accuracy (PFM, VOUT ≥ 1.2 V) | VFB | -1.4 | 3 | % | VIN ≥ VOUT + 1 V; IOUT = 0 mA, VOUT ≥ 1.2 V, PFM mode | 6 | |
| Feedback voltage accuracy (PFM, VOUT < 1.2 V) | VFB | -1.4 | 3.7 | % | VIN ≥ VOUT + 1 V; IOUT = 0 mA, VOUT < 1.2 V, PFM mode | 6 | |
| Feedback input bias current | IFB | 10 | 100 | nA | VFB = 0.8 V | 6 | |
| Junction-to-ambient thermal resistance | RθJA | 47 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 60 | °C/W | 5 | |||
| Junction-to-board thermal resistance | RθJB | 20 | °C/W | 5 | |||
| Junction-to-top characterization parameter | ψJT | 1.5 | °C/W | 5 | |||
| Junction-to-board characterization parameter | ψJB | 20 | °C/W | 5 | |||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 5.3 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
TLV62090RGTT - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
tlv62090rgtt-etched.step/tlv62090rgtt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv62090rgtt.step/tlv62090rgtt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
0986be12af6c7689, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).