component
MSP430F47187IPZR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430F47187IPZR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)
MSP430F47187IPZR from Texas Instruments, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0.0+ | input | SD16_A positive analog input A0.0; differential input with A0.0-- for sigma-delta ADC channel 0. |
| 2 | A0.0-- | input | SD16_A negative analog input A0.0; differential input with A0.0+ for sigma-delta ADC channel 0. |
| 3 | A1.0+ | input | SD16_A positive analog input A1.0; differential input with A1.0-- for sigma-delta ADC channel 1. |
| 4 | A1.0-- | input | SD16_A negative analog input A1.0; differential input with A1.0+ for sigma-delta ADC channel 1. |
| 5 | A2.0+ | input | SD16_A positive analog input A2.0; differential input with A2.0-- for sigma-delta ADC channel 2. |
| 6 | A2.0-- | input | SD16_A negative analog input A2.0; differential input with A2.0+ for sigma-delta ADC channel 2. |
| 7 | AVSS | power_in | Analog supply voltage, negative terminal; must be connected to ground (VSS). |
| 8 | AVCC | power_in | Analog supply voltage, positive terminal; must not power up prior to DVCC1/DVCC2; connect to 2.5 V to 3.6 V. |
| 9 | VREF | power_in | Input for external reference voltage or internal reference voltage output; can be used as mid-voltage reference for analog circuits. |
| 10 | A3.0+ | input | SD16_A positive analog input A3.0 (MSP430F471x6/7 only); differential input for sigma-delta ADC channel 3; connect to AVSS if unused. |
| 11 | A3.0-- | input | SD16_A negative analog input A3.0 (MSP430F471x6/7 only); differential input for sigma-delta ADC channel 3; connect to AVSS if unused. |
| 12 | A4.0+ | input | SD16_A positive analog input A4.0 (MSP430F471x6/7 only); differential input for sigma-delta ADC channel 4; connect to AVSS if unused. |
| 13 | A4.0-- | input | SD16_A negative analog input A4.0 (MSP430F471x6/7 only); differential input for sigma-delta ADC channel 4; connect to AVSS if unused. |
| 14 | A5.0+ | input | SD16_A positive analog input A5.0 (MSP430F471x6/7 only); differential input for sigma-delta ADC channel 5; connect to AVSS if unused. |
| 15 | A5.0-- | input | SD16_A negative analog input A5.0 (MSP430F471x6/7 only); differential input for sigma-delta ADC channel 5; connect to AVSS if unused. |
| 16 | A6.0+ | input | SD16_A positive analog input A6.0 (MSP430F471x7 only); differential input for sigma-delta ADC channel 6; connect to AVSS if unused. |
| 17 | A6.0-- | input | SD16_A negative analog input A6.0 (MSP430F471x7 only); differential input for sigma-delta ADC channel 6; connect to AVSS if unused. |
| 18 | AVSS | power_in | Analog supply voltage, negative terminal; must be connected to ground (VSS). |
| 19 | P10.3/S0 | bidirectional | General-purpose digital I/O or LCD segment output S0; individually programmable as input or output with pull-up/pull-down resistor. |
| 20 | P10.2/S1 | bidirectional | General-purpose digital I/O or LCD segment output S1; individually programmable as input or output with pull-up/pull-down resistor. |
| 21 | P10.1/S2 | bidirectional | General-purpose digital I/O or LCD segment output S2; individually programmable as input or output with pull-up/pull-down resistor. |
| 22 | P10.0/S3 | bidirectional | General-purpose digital I/O or LCD segment output S3; individually programmable as input or output with pull-up/pull-down resistor. |
| 23 | P9.7/S4 | bidirectional | General-purpose digital I/O or LCD segment output S4; individually programmable as input or output with pull-up/pull-down resistor. |
| 24 | P9.6/S5 | bidirectional | General-purpose digital I/O or LCD segment output S5; individually programmable as input or output with pull-up/pull-down resistor. |
| 25 | P9.5/S6 | bidirectional | General-purpose digital I/O or LCD segment output S6; individually programmable as input or output with pull-up/pull-down resistor. |
| 26 | P9.4/S7 | bidirectional | General-purpose digital I/O or LCD segment output S7; individually programmable as input or output with pull-up/pull-down resistor. |
| 27 | P9.3/S8 | bidirectional | General-purpose digital I/O or LCD segment output S8; individually programmable as input or output with pull-up/pull-down resistor. |
| 28 | P9.2/S9 | bidirectional | General-purpose digital I/O or LCD segment output S9; individually programmable as input or output with pull-up/pull-down resistor. |
| 29 | P9.1/S10 | bidirectional | General-purpose digital I/O or LCD segment output S10; individually programmable as input or output with pull-up/pull-down resistor. |
| 30 | P9.0/S11 | bidirectional | General-purpose digital I/O or LCD segment output S11; individually programmable as input or output with pull-up/pull-down resistor. |
| 31 | P8.7/S12 | bidirectional | General-purpose digital I/O or LCD segment output S12; individually programmable as input or output with pull-up/pull-down resistor. |
| 32 | P8.6/S13 | bidirectional | General-purpose digital I/O or LCD segment output S13; individually programmable as input or output with pull-up/pull-down resistor. |
| 33 | P8.5/S14 | bidirectional | General-purpose digital I/O or LCD segment output S14; individually programmable as input or output with pull-up/pull-down resistor. |
| 34 | P8.4/S15 | bidirectional | General-purpose digital I/O or LCD segment output S15; individually programmable as input or output with pull-up/pull-down resistor. |
| 35 | P8.3/S16 | bidirectional | General-purpose digital I/O or LCD segment output S16; individually programmable as input or output with pull-up/pull-down resistor. |
| 36 | P8.2/S17 | bidirectional | General-purpose digital I/O or LCD segment output S17; individually programmable as input or output with pull-up/pull-down resistor. |
| 37 | P8.1/S18 | bidirectional | General-purpose digital I/O or LCD segment output S18; individually programmable as input or output with pull-up/pull-down resistor. |
| 38 | P8.0/S19 | bidirectional | General-purpose digital I/O or LCD segment output S19; individually programmable as input or output with pull-up/pull-down resistor. |
| 39 | P7.7/S20 | bidirectional | General-purpose digital I/O or LCD segment output S20; individually programmable as input or output with pull-up/pull-down resistor. |
| 40 | P7.6/S21 | bidirectional | General-purpose digital I/O or LCD segment output S21; individually programmable as input or output with pull-up/pull-down resistor. |
| 41 | P7.5/S22 | bidirectional | General-purpose digital I/O or LCD segment output S22; individually programmable as input or output with pull-up/pull-down resistor. |
| 42 | P7.4/S23 | bidirectional | General-purpose digital I/O or LCD segment output S23; individually programmable as input or output with pull-up/pull-down resistor. |
| 43 | P7.3/S24 | bidirectional | General-purpose digital I/O or LCD segment output S24; individually programmable as input or output with pull-up/pull-down resistor. |
| 44 | P7.2/S25 | bidirectional | General-purpose digital I/O or LCD segment output S25; individually programmable as input or output with pull-up/pull-down resistor. |
| 45 | P7.1/S26 | bidirectional | General-purpose digital I/O or LCD segment output S26; individually programmable as input or output with pull-up/pull-down resistor. |
| 46 | P7.0/S27 | bidirectional | General-purpose digital I/O or LCD segment output S27; individually programmable as input or output with pull-up/pull-down resistor. |
| 47 | P4.7/S28 | bidirectional | General-purpose digital I/O or LCD segment output S28; individually programmable as input or output with pull-up/pull-down resistor. |
| 48 | P4.6/S29 | bidirectional | General-purpose digital I/O or LCD segment output S29; individually programmable as input or output with pull-up/pull-down resistor. |
| 49 | P4.5/S30 | bidirectional | General-purpose digital I/O or LCD segment output S30; individually programmable as input or output with pull-up/pull-down resistor. |
| 50 | P4.4/S31 | bidirectional | General-purpose digital I/O or LCD segment output S31; individually programmable as input or output with pull-up/pull-down resistor. |
| 51 | P4.3/S32 | bidirectional | General-purpose digital I/O or LCD segment output S32; individually programmable as input or output with pull-up/pull-down resistor. |
| 52 | P4.2/S33 | bidirectional | General-purpose digital I/O or LCD segment output S33; individually programmable as input or output with pull-up/pull-down resistor. |
| 53 | P4.1/DMAE0/S34 | bidirectional | General-purpose digital I/O or DMA Channel 0 external trigger input or LCD segment output S34; individually programmable as input or output. |
| 54 | P4.0/CAOUT/S35 | bidirectional | General-purpose digital I/O or Comparator_A output or LCD segment output S35; individually programmable as input or output. |
| 55 | P5.0/SVSIN | bidirectional | General-purpose digital I/O or analog input to supply voltage supervisor; individually programmable with pull-up/pull-down resistor. |
| 56 | P5.1/COM0 | bidirectional | General-purpose digital I/O or LCD common output COM0 for backplane driving; individually programmable as input or output. |
| 57 | P5.2/COM1 | bidirectional | General-purpose digital I/O or LCD common output COM1 for backplane driving; individually programmable as input or output. |
| 58 | P5.3/COM2 | bidirectional | General-purpose digital I/O or LCD common output COM2 for backplane driving; individually programmable as input or output. |
| 59 | P5.4/COM3 | bidirectional | General-purpose digital I/O or LCD common output COM3 for backplane driving; individually programmable as input or output. |
| 60 | P5.5/R03 | bidirectional | General-purpose digital I/O or input port of lowest analog LCD level (V5); individually programmable with pull-up/pull-down resistor. |
| 61 | P5.6/LCDREF/R13 | bidirectional | General-purpose digital I/O or external reference voltage input for regulated LCD voltage or LCD level input R13; individually programmable. |
| 62 | P5.7/R23 | bidirectional | General-purpose digital I/O or input port of second most positive analog LCD level (V2); individually programmable with pull-up/pull-down resistor. |
| 63 | LCDCAP/R33 | bidirectional | LCD charge pump capacitor connection or input/output port of most positive analog LCD level (V1); connect 4.7 μF external capacitor when charge pump enabled. |
| 64 | DVCC2 | power_in | Digital supply voltage, positive terminal; connect to 2.2 V to 3.6 V for digital core power. |
| 65 | XIN | input | Input port for crystal oscillator XT1 (LFXT1); accepts standard or watch crystals with frequency around 32768 Hz. |
| 66 | XOUT | output | Output terminal of crystal oscillator XT1; provides oscillator output signal for crystal frequency stabilization. |
| 67 | DVSS2 | power_in | Digital supply voltage, negative terminal; must be connected to ground (VSS). |
| 68 | P3.7/TB2/S36 | bidirectional | General-purpose digital I/O or Timer_B3 CCR2 capture/compare or LCD segment output S36; individually programmable as input or output. |
| 69 | P3.6/TB1/S37 | bidirectional | General-purpose digital I/O or Timer_B3 CCR1 capture/compare or LCD segment output S37; individually programmable as input or output. |
| 70 | P3.5/TB0/S38 | bidirectional | General-purpose digital I/O or Timer_B3 CCR0 capture/compare or LCD segment output S38; individually programmable as input or output. |
| 71 | P3.4/TA2/S39 | bidirectional | General-purpose digital I/O or Timer_A CCI2A capture input or TA2 compare output or LCD segment output S39; individually programmable. |
| 72 | P3.3/UCB0CLK/UCA0STE | bidirectional | General-purpose digital I/O or USCI_B0 clock input/output or USCI_A0 slave transmit enable; pin direction controlled by USCI module when selected. |
| 73 | P3.2/UCB0SOMI/UCB0SCL | bidirectional | General-purpose digital I/O or USCI_B0 slave out/master in in SPI mode or SCL I2C clock in I2C mode; open-drain for I2C. |
| 74 | P3.1/UCB0SIMO/UCB0SDA | bidirectional | General-purpose digital I/O or USCI_B0 slave in/master out in SPI mode or SDA I2C data in I2C mode; open-drain for I2C. |
| 75 | P3.0/UCB0STE/UCA0CLK | bidirectional | General-purpose digital I/O or USCI_B0 slave transmit enable or USCI_A0 clock input/output; pin direction controlled by USCI module. |
| 76 | P2.7/CA1 | bidirectional | General-purpose digital I/O or Comparator_A positive/negative input; individually programmable with pull-up/pull-down resistor. |
| 77 | P2.6/CA0 | bidirectional | General-purpose digital I/O or Comparator_A positive/negative input; individually programmable with pull-up/pull-down resistor. |
| 78 | P2.5/UCA0RXD/UCA0SOMI | bidirectional | General-purpose digital I/O or USCI_A0 receive data input in UART mode or slave out/master in in SPI mode; pin direction controlled by USCI module. |
| 79 | P2.4/UCA0TXD/UCA0SIMO | bidirectional | General-purpose digital I/O or USCI_A0 transmit data output in UART mode or slave in/master out in SPI mode; pin direction controlled by USCI module. |
| 80 | P2.3/UCB1CLK/UCA1STE | bidirectional | General-purpose digital I/O or USCI_B1 clock input/output or USCI_A1 slave transmit enable; pin direction controlled by USCI module when selected. |
| 81 | P2.2/UCB1SOMI/UCB1SCL | bidirectional | General-purpose digital I/O or USCI_B1 slave out/master in in SPI mode or SCL I2C clock in I2C mode; open-drain for I2C. |
| 82 | P2.1/UCB1SIMO/UCB1SDA | bidirectional | General-purpose digital I/O or USCI_B1 slave in/master out in SPI mode or SDA I2C data in I2C mode; open-drain for I2C. |
| 83 | P2.0/UCB1STE/UCA1CLK | bidirectional | General-purpose digital I/O or USCI_B1 slave transmit enable or USCI_A1 clock input/output; pin direction controlled by USCI module. |
| 84 | P1.7/UCA1RXD/UCA1SOMI | bidirectional | General-purpose digital I/O or USCI_A1 receive data input in UART mode or slave out/master in in SPI mode; pin direction controlled by USCI module. |
| 85 | P1.6/UCA1TXD/UCA1SIMO | bidirectional | General-purpose digital I/O or USCI_A1 transmit data output in UART mode or slave in/master out in SPI mode; pin direction controlled by USCI module. |
| 86 | P1.5/TACLK/ACLK | bidirectional | General-purpose digital I/O or Timer_A TACLK input or ACLK output (divided by 1, 2, 4, or 8); individually programmable with pull-up/pull-down resistor. |
| 87 | P1.4/TBCLK/SMCLK | bidirectional | General-purpose digital I/O or Timer_B TBCLK input or SMCLK submain system clock output; individually programmable with pull-up/pull-down resistor. |
| 88 | P1.3/TBOUTH/SVSOUT | bidirectional | General-purpose digital I/O or Timer_B3 TBOUTH control to switch PWM outputs to high impedance or SVS comparator output; individually programmable. |
| 89 | P1.2/TA1 | bidirectional | General-purpose digital I/O or Timer_A CCI1A capture input or TA1 compare output; individually programmable as input or output. |
| 90 | P1.1/TA0/MCLK | bidirectional | General-purpose digital I/O or Timer_A CCI0B capture input only or MCLK main clock output; individually programmable or fixed for MCLK output. |
| 91 | P1.0/TA0 | bidirectional | General-purpose digital I/O or Timer_A CCI0A capture input or TA0 compare output or BSL transmit; individually programmable as input or output. |
| 92 | DVCC1 | power_in | Digital supply voltage, positive terminal; connect to 2.2 V to 3.6 V for digital core and JTAG power. |
| 93 | XT2OUT | output | Output terminal of crystal oscillator XT2; provides high-frequency oscillator output signal from 0.4 MHz to 16 MHz. |
| 94 | XT2IN | input | Input port for crystal oscillator XT2; accepts standard crystals with frequency range 0.4 MHz to 16 MHz; resonators not recommended. |
| 95 | DVSS1 | power_in | Digital supply voltage, negative terminal; must be connected to ground (VSS). |
| 96 | TDO/TDI | bidirectional | Test data output port or programming data input terminal for JTAG interface; bidirectional for test and emulation operations. |
| 97 | TDI/TCLK | input | Test data input or test clock input for JTAG interface; device protection fuse is connected to this pin; internal pull-up resistor implemented. |
| 98 | TMS | input | Test mode select input for JTAG interface; used as input port for device programming and test; internal pull-up resistor implemented. |
| 99 | TCK | input | Test clock input for JTAG interface; clock input port for device programming and test; accept frequencies 0 to 10 MHz at 3 V. |
| 100 | RST/NMI | input | Reset input or nonmaskable interrupt input port; must not be left floating; pull-up resistor recommended; minimum pulse width 2 μs. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
CAD (KiCad official)
- Symbol:
MSP430F47187IPZR - Footprint:
Package_QFP:LQFP-100_14x14mm_P0.5mm - 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files:
msp430f47187ipzr-etched.step/msp430f47187ipzr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430f47187ipzr.step/msp430f47187ipzr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (92 pp, sha256
890f49d1d54dc9f3, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).