component
XD33063
Public Made by Adomby adom
XINLUDA DC-DC Converters, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownXD33063
XINLUDA · DC-DC Converters · DIP-8
XD33063 from XINLUDA, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Switch Collector | bidirectional | High-current internal switch collector input, with switch current rated up to 1.5 A and switch collector voltage up to 40 Vdc. |
| 2 | Switch Emitter | bidirectional | High-current internal switch emitter output, with switch emitter voltage rated up to 40 Vdc. |
| 3 | Timing Capacitor | passive | Attach a timing capacitor to change the switching frequency. |
| 4 | GND | power_in | Ground reference pin. |
| 5 | Comparator Inverting Input | input | Attach to a resistor divider network to create a feedback loop; comparator input voltage range is −0.3 V to +40 Vdc. |
| 6 | VCC | power_in | Logic supply voltage that is tied to VIN; power supply voltage is rated 40 Vdc maximum and the datasheet gives an input range of 3.0 V to 40 V. |
| 7 | IPK Sense | input | Current-limit sense input, with a current limit sense voltage of 250 mV min, 300 mV typ, 350 mV max. |
| 8 | Driver Collector | bidirectional | Darlington pair driving transistor collector input, with driver collector voltage rated 40 Vdc and driver collector current rated 100 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | DIP-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power Supply Voltage | VCC | 40 | Vdc | 4 | |||
| Comparator Input Voltage Range | VIR | -0.3 | 40 | Vdc | 4 | ||
| Switch Collector Voltage | VC(switch) | 40 | Vdc | 4 | |||
| Switch Emitter Voltage | VE(switch) | 40 | Vdc | VPin 1 = 40 V | 4 | ||
| Switch Collector to Emitter Voltage | VCE(switch) | 40 | Vdc | 4 | |||
| Driver Collector Voltage | VC(driver) | 40 | Vdc | 4 | |||
| Driver Collector Current | IC(driver) | 100 | mA | Note 1 | 4 | ||
| Switch Current | ISW | 1.5 | A | 4 | |||
| Operating Junction Temperature | TJ | 125 | C | 4 | |||
| Storage Temperature Range | Tstg | -45 | 125 | C | 4 | ||
| Operating Ambient Temperature Range (33063 series) | TA | -40 | 85 | C | 33063 (XL33063 / XD33063) | 4 | |
| Input supply voltage (operation from input) | VCC | 3 | 40 | V | Operation from 3.0 V to 40 V input (Features list) | 1 | |
| Power Dissipation (plastic P/P1 suffix) | PD | 1.25 | W | TA = 25C, plastic package P, P1 suffix | 4 | ||
| Thermal Resistance, junction to ambient (plastic) | RθJA | 115 | C/W | plastic package P, P1 suffix | 4 | ||
| Oscillator Frequency | fosc | 24 | 33 | 42 | kHz | VPin 5 = 0 V, CT = 1.0 nF, TA = 25C | 5 |
| Charge Current | Ichg | 24 | 35 | 42 | µA | VCC = 5.0 V to 40 V, TA = 25C | 5 |
| Discharge Current | Idischg | 140 | 220 | 260 | µA | VCC = 5.0 V to 40 V, TA = 25C | 5 |
| Discharge to Charge Current Ratio | Idischg/Ichg | 5.2 | 6.5 | 7.5 | , | Pin 7 to VCC, TA = 25C | 5 |
| Current Limit Sense Voltage | Vipk(sense) | 250 | 300 | 350 | mV | Ichg = Idischg, TA = 25C | 5 |
| Saturation Voltage, Darlington Connection | VCE(sat) | 1 | 1.3 | V | ISW = 1.0 A, Pins 1, 8 connected | 5 | |
| Saturation Voltage (non-Darlington, Note 6) | VCE(sat) | 0.45 | 0.7 | V | ISW = 1.0 A, RPin 8 = 82 Ω to VCC, Forced ß 20 | 5 | |
| DC Current Gain | hFE | 50 | 75 | , | ISW = 1.0 A, VCE = 5.0 V, TA = 25C | 5 | |
| Collector Off-State Current | IC(off) | 0.01 | 100 | µA | VCE = 40 V | 5 | |
| Threshold Voltage | Vth | 1.225 | 1.25 | 1.275 | V | TA = 25C | 5 |
| Threshold Voltage over temperature | Vth | 1.21 | 1.29 | V | TA = Tlow to Thigh | 5 | |
| Threshold Voltage Line Regulation | Regline | 1.4 | 5 | mV | VCC = 3.0 V to 40 V | 5 | |
| Input Bias Current | IB | -20 | -400 | nA | Vin = 0 V | 5 | |
| Supply Current | ICC | 4 | mA | VCC = 5.0 V to 40 V, CT = 1.0 nF, Pin 7 = VCC, VPin 5 > Vth, Pin 2 = GND, remaining pins open | 5 |
CAD (KiCad official)
- Symbol:
XD33063 - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
xd33063-etched.step/xd33063-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xd33063.step/xd33063.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XINLUDA datasheet (12 pp, sha256
7b507128af616de9, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).