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Contents

README

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MCP6S28T-I

Microchip Tech · Programmable/Variable Gain Amplifiers (PGAs/VGAs) · SOIC-16

MCP6S28T-I from Microchip Tech, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT output Analog output, a low-impedance voltage source whose value is set by the selected gain, selected input channel and the voltage at VREF; short-circuit current typically ±30 mA.
2 CH0 input Analog input channel 0, a high-impedance CMOS input with low bias current that the internal MUX can select for amplification.
3 CH1 input Analog input channel 1, a high-impedance CMOS input with low bias current that the internal MUX can select for amplification.
4 CH2 input Analog input channel 2, a high-impedance CMOS input with low bias current that the internal MUX can select for amplification.
5 CH3 input Analog input channel 3, a high-impedance CMOS input with low bias current that the internal MUX can select for amplification.
6 CH4 input Analog input channel 4, a high-impedance CMOS input with low bias current that the internal MUX can select for amplification.
7 CH5 input Analog input channel 5, a high-impedance CMOS input with low bias current that the internal MUX can select for amplification.
8 CH6 input Analog input channel 6, a high-impedance CMOS input with low bias current that the internal MUX can select for amplification.
9 CH7 input Analog input channel 7, a high-impedance CMOS input with low bias current that the internal MUX can select for amplification.
10 VREF power_in External reference pin that should be at a voltage between VSS and VDD and shifts the output voltage.
11 VSS power_in Negative power supply pin, normally connected to ground in single-supply use, with VDD 2.5V to 5.5V above it.
12 CS input SPI chip select, a Schmitt-triggered CMOS logic input.
13 SI input SPI serial data input, a Schmitt-triggered CMOS logic input.
14 SO output SPI serial data output, a CMOS push-pull output that never goes High-Z and is forced low when CS goes high, supporting daisy chaining.
15 SCK input SPI clock input, a Schmitt-triggered CMOS logic input.
16 VDD power_in Positive power supply pin, 2.5V to 5.5V above VSS, needing a local 0.1 µF bypass capacitor.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-16
Category Operational Amplifier/Comparator
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS -275 275 µV G = +1, VDD = 4.0V 2
Power Supply Rejection Ratio PSRR 70 85 dB G = +1 (Note 1) 2
Input Bias Current over Temperature IB 250 pA TA = -40 to +85°C, CHx = VDD/2 2
DC Gain Error G = +1 gE -0.1 0.1 % VOUT ≈ 0.3V to VDD - 0.3V 2
DC Gain Error G ≥ +2 gE -1 1 % VOUT ≈ 0.3V to VDD - 0.3V 2
Internal Resistance RLAD 3.4 4.9 6.4 kΩ (Note 1) 2
Supply Voltage VDD 2.5 5.5 V 3
Quiescent Current IQ 0.5 1 1.35 mA IO = 0 (Note 2) 3
Quiescent Current, Shutdown mode IQ_SHDN 0.5 1 µA IO = 0 (Note 2) 3
POR Trip Voltage VPOR 1.2 1.7 2.2 V (Note 3) 3
Input Leakage Current IIL -1 1 µA 4
Amplifier Output Leakage Current -1 1 µA In Shutdown mode 4
Input Rise/Fall Times (CS, SI, SCK) tRFI 2 µs Note 1 4
CS high time tCSH 40 ns 4
SCK edge to CS fall setup time tCS0 10 ns SCK edge when CS is high 4
CS fall to first SCK edge setup time tCSSC 40 ns 4
SCK Frequency fSCK 10 MHz VDD = 5V (Note 2) 4
SCK high time tHI 40 ns 4
SCK low time tLO 40 ns 4
SCK last edge to CS rise setup time tSCCS 30 ns 4
CS rise to SCK edge setup time tCS1 100 ns SCK edge when CS is high 4
SI set-up time tSU 40 ns 4
SI hold time tHD 10 ns 4
SCK to SO valid propagation delay tDO 80 ns MCP6S26 and MCP6S28 4
CS rise to SO forced to zero tSOZ 80 ns MCP6S26 and MCP6S28 4
Out of Shutdown to Amplifier Output Turn-on Time tON 3.5 10 µs CS = 0.7VDD to VOUT 90% point 4
Specified Temperature Range TA -40 85 °C 5
Operating Temperature Range TA -40 125 °C Note 1 5
Storage Temperature Range TA -65 150 °C 5
Supply voltage VDD - VSS VDD - VSS 7 V 2
Current at Input Pin 2 mA 2
Current at Output and Supply Pins 30 mA 2
Storage temperature -65 150 °C 2
Junction temperature 150 °C 2
ESD protection on all pins (HBM) 2 kV HBM 2
ESD protection on all pins (MM) 200 V MM 2
Thermal Resistance, 16L-SOIC θJA 90 °C/W 5
Input Offset Voltage Drift ΔVOS/ΔTA 4 µV/°C TA = -40 to +85°C (printed ±4) 2
Internal Resistance over Temperature ΔRLAD/ΔTA 0.028 %/°C (Note 1) TA = -40 to +85°C 2
DC Gain Drift G = +1 ΔG/ΔTA 0.0002 %/°C TA = -40 to +85°C (printed ±0.0002) 2
DC Gain Drift G ≥ +2 ΔG/ΔTA 0.0004 %/°C TA = -40 to +85°C (printed ±0.0004) 2
Short-Circuit Current IO(SC) 30 mA printed ±30 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 8-Lead Plastic Small Outline (SN), Narrow, 150 mil (SOIC) Foot Angle  048048 32

CAD (KiCad official)

  • Symbol: MCP6S28T-I
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: mcp6s28t-i-etched.step / mcp6s28t-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp6s28t-i.step / mcp6s28t-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (42 pp, sha256 012e5e55acf350c4, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF