FT240XQ-T from FTDI, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	D1	bidirectional	FIFO Data Bus Bit 1.
2	D7	bidirectional	FIFO Data Bus Bit 7.
3	GND	power_in	Device ground supply pin.
4	D5	bidirectional	FIFO Data Bus Bit 5.
5	D6	bidirectional	FIFO Data Bus Bit 6.
6	D3	bidirectional	FIFO Data Bus Bit 3.
7	SIWU#	input	Active low input used to flush the IC buffer back to the PC (Send Immediate) or as a wake up signal when the PC is in suspend mode.
8	RD#	input	Enables the current FIFO data byte on D0...D7 when low and fetches the next FIFO data byte from the receive FIFO buffer when RD# goes from high to low.
9	WR	input	Writes the data byte on the D0...D7 pins into the transmit FIFO buffer when WR goes from high to low.
10	USBDP	bidirectional	USB Data Signal Plus, incorporating 1.5kΩ pull up resistor to 3.3V.
11	USBDM	bidirectional	USB Data Signal Minus.
12	3V3OUT	power_out	3V3 output at 50mA that may be used to power VCCIO; when VCC is 3V3 this pin is an input and should be connected to pin 15.
13	RESET#	input	Active low reset pin used by an external device to reset the FT240X; can be left unconnected or pulled up to VCC if not required.
14	VCORE	power_out	+1V8 output that may be left unterminated.
15	VCC	power_in	+5V (or 3V3) supply to the device core.
16	GND	power_in	Device ground supply pin.
17	TXE#	output	When high, do not write data into the FIFO; when low, data can be written by strobing WR high then low; tristate during reset.
18	RXF#	output	When high, do not read data from the FIFO; when low, data is available to read by strobing RD# low then high; tristate during reset, and becomes an input during USB suspend if Remote Wakeup is enabled.
19	CBUS6	bidirectional	Configurable CBUS I/O pin whose function is set in the device MTP memory (see Table 3.9).
20	CBUS5	bidirectional	Configurable CBUS I/O pin whose function is set in the device MTP memory (see Table 3.9).
21	D0	bidirectional	FIFO Data Bus Bit 0.
22	D4	bidirectional	FIFO Data Bus Bit 4.
23	D2	bidirectional	FIFO Data Bus Bit 2.
24	VCCIO	power_in	1V8 - 3V3 supply for the IO cells.
25	GND	power_in	Centre pad on package base, internally connected to GND; connect to GND.

Key specifications

Parameter	Value
Manufacturer	FTDI
Package	QFN-24-EP(4x4)
Category	Interface ICs
Pins	25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
VCC Operating Supply Voltage	VCC	2.97	5	5.5	V	Normal Operation	17
VCCIO Operating Supply Voltage	VCC2	1.62		3.63	V		17
Operating Supply Current	Icc1	8	8	8.4	mA	Normal Operation	17
Operating Supply Current (suspend)	Icc2		125		μA	USB Suspend	17
3.3V regulator output	3V3	2.97	3.3	3.63	V	VCC must be greater than 3V3 otherwise 3V3OUT is an input which must be driven with 3.3V	17
Output Voltage High (VCCIO=3.3V)	Voh	2.97			V	Ioh = +/-2mA, I/O Drive strength = 4mA	17
Output Voltage Low (VCCIO=3.3V)	Vol	0		0.4	V	Iol = +/-2mA, I/O Drive strength = 4mA	17
Input low Switching Threshold (VCCIO=3.3V)	Vil			0.8	V	LVTTL	18
Input High Switching Threshold (VCCIO=3.3V)	Vih	2			V	LVTTL	18
Input pull-up resistance (VCCIO=3.3V)	Rpu	40	75	190	KΩ	Vin = 0	18
Input pull-down resistance (VCCIO=3.3V)	Rpd	40	75	190	KΩ	Vin =VCCIO	18
Input Leakage Current (VCCIO=3.3V)	Iin	-10	1	10	μA	Vin = 0	18
Tri-state output leakage current (VCCIO=3.3V)	Ioz	-10	1	10	μA	Vin = 5.5V or 0	18
Output Voltage High (VCCIO=2.5V)	Voh	2.25			V	Ioh = +/-2mA, I/O Drive strength = 4mA	18
Output Voltage Low (VCCIO=2.5V)	Vol	0		0.4	V	Iol = +/-2mA, I/O Drive strength = 4mA	18
Input low Switching Threshold (VCCIO=2.5V)	Vil			0.8	V	LVTTL	19
Input pull-up resistance (VCCIO=2.5V)	Rpu	40	75	190	KΩ	Vin = 0	19
Input pull-down resistance (VCCIO=2.5V)	Rpd	40	75	190	KΩ	Vin =VCCIO	19
Input Leakage Current (VCCIO=2.5V)	Iin	-10	1	10	μA	Vin = 0	19
Tri-state output leakage current (VCCIO=2.5V)	Ioz	-10	1	10	μA	Vin = 5.5V or 0	19
Output Voltage High (VCCIO=1.8V)	Voh	1.62			V	Ioh = +/-2mA, I/O Drive strength = 4mA	19
Output Voltage Low (VCCIO=1.8V)	Vol	0		0.4	V	Iol = +/-2mA, I/O Drive strength = 4mA	19
Input low Switching Threshold (VCCIO=1.8V)	Vil			0.77	V	LVTTL	19
Input High Switching Threshold (VCCIO=1.8V)	Vih	1.6			V	LVTTL	20
Input pull-up resistance (VCCIO=1.8V)	Rpu	40	75	190	KΩ	Vin = 0	20
Input pull-down resistance (VCCIO=1.8V)	Rpd	40	75	190	KΩ	Vin =VCCIO	20
Input Leakage Current (VCCIO=1.8V)	Iin	-10	1	10	μA	Vin = 0	20
Tristate output leakage current (VCCIO=1.8V)	Ioz	-10	1	10	μA	Vin = 5.5V or 0	20
USB Output Voltage Low	Vol			0.2	V	USBDP, USBDM	20
USB Input low Switching Threshold	Vil			0.8	V	USBDP, USBDM	20
USB Input High Switching Threshold	Vih	2			V	USBDP, USBDM	20
Internal Clock Frequency of Operation		11.98	12	12.02	MHz	Equivalent to +/-1667ppm	21
Internal Clock Period		83.19	83.33	83.47	ns		21
Internal Clock Duty Cycle		45	50	55	%		21
Storage Temperature		-65		150	°C		16
Ambient Operating Temperature		-40		85	°C	Power Applied	16
VCC Supply Voltage	VCC	-0.3		5.5	V		16
VCCIO IO Voltage	VCCIO	-0.3		4	V		16
DC Input Voltage, USBDP and USBDM		-0.5		3.63	V		16
DC Input Voltage, High Impedance Bi-directional		-0.3		5.8	V	powered from VCCIO	16
DC Output Current, Outputs				22	mA		16
WR Active Pulse Width	T7	50			ns		13
WR to WR Pre-Charge Time	T8	50			ns		13
Valid data setup to WR falling edge	T9	20			ns	Load = 30pF	13
Valid Data Hold Time from WR Inactive	T10	0			ns	Load = 30pF	13
WR Inactive to TXE#	T11	5		25	ns		13
TXE# Inactive After WR Cycle	T12	80			ns		13

CAD (KiCad official)

Symbol: FT240XQ-T
Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
3D model files: ft240xq-t-etched.step / ft240xq-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ft240xq-t.step / ft240xq-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: FTDI datasheet (41 pp, sha256 5765a1e6b849401b, retrieved 2026-10-31, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

FT240XQ-T

Verified FT240XQ-T

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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