Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

ATMEGA168P-20AU

Microchip Tech · Pre-ordered MCUs · TQFP-32(7x7)

ATMEGA168P-20AU from Microchip Tech, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PD3 bidirectional Port D bit 3 is a bidirectional I/O pin with internal pull-ups, also serving as external interrupt INT1, OC2B output compare output, and PCINT19 pin-change interrupt source.
2 PD4 bidirectional Port D bit 4 is a bidirectional I/O pin with internal pull-ups, also serving as USART external clock XCK, Timer/Counter0 external counter input T0, and PCINT20.
3 GND power_in Ground.
4 VCC power_in Digital supply voltage.
5 GND power_in Ground.
6 VCC power_in Digital supply voltage.
7 PB6 input Depending on clock fuse settings, PB6 is the input to the inverting oscillator amplifier (XTAL1) or Timer Oscillator pin 1, and when used as a clock pin it cannot be used as an I/O pin.
8 PB7 output Depending on clock fuse settings, PB7 is the output of the inverting oscillator amplifier (XTAL2) or Timer Oscillator pin 2, and when used as a clock pin it cannot be used as an I/O pin.
9 PD5 bidirectional Port D bit 5 is a bidirectional I/O pin with internal pull-ups, also serving as Timer/Counter1 external counter input T1, OC0B output compare output, and PCINT21.
10 PD6 bidirectional Port D bit 6 is a bidirectional I/O pin with internal pull-ups, also serving as Analog Comparator positive input AIN0, OC0A output compare output, and PCINT22; configure as input with pull-up off when used as AIN0.
11 PD7 bidirectional Port D bit 7 is a bidirectional I/O pin with internal pull-ups, also serving as Analog Comparator negative input AIN1 and PCINT23; configure as input with pull-up off when used as AIN1.
12 PB0 bidirectional Port B bit 0 is a bidirectional I/O pin with internal pull-ups, also serving as Timer/Counter1 input capture ICP1, divided system clock output CLKO, and PCINT0.
13 PB1 (OC1A/PCINT1) bidirectional Port B bit 1 is a bidirectional I/O pin with internal pull-ups, also serving as Timer/Counter1 output compare output OC1A and PCINT1.
14 PB2 (SS/OC1B/PCINT2) bidirectional Port B bit 2 is a bidirectional I/O pin with internal pull-ups, also serving as SPI slave select SS, Timer/Counter1 output compare output OC1B, and PCINT2.
15 PB3 (MOSI/OC2A/PCINT3) bidirectional Port B bit 3 is a bidirectional I/O pin with internal pull-ups, also serving as SPI master output/slave input MOSI, Timer/Counter2 output compare output OC2A, and PCINT3.
16 PB4 (MISO/PCINT4) bidirectional Port B bit 4 is a bidirectional I/O pin with internal pull-ups, also serving as SPI master input/slave output MISO and PCINT4.
17 PB5 (SCK/PCINT5) bidirectional Port B bit 5 is a bidirectional I/O pin with internal pull-ups, also serving as SPI clock SCK and PCINT5.
18 AVCC power_in Supply voltage pin for the A/D Converter, PC3:0 and ADC7:6; it should be externally connected to VCC even if the ADC is not used, and through a low-pass filter if the ADC is used.
19 ADC6 input Analog input channel 6 of the 10-bit A/D converter (TQFP and QFN/MLF packages only), powered from the analog supply.
20 AREF input Analog reference pin for the A/D Converter.
21 GND power_in Ground.
22 ADC7 input Analog input channel 7 of the 10-bit A/D converter (TQFP and QFN/MLF packages only), powered from the analog supply.
23 PC0 (ADC0/PCINT8) bidirectional Port C bit 0 is a bidirectional I/O pin with internal pull-ups (Port C is 7-bit), also serving as ADC input channel 0 using analog power and PCINT8.
24 PC1 (ADC1/PCINT9) bidirectional Port C bit 1 is a bidirectional I/O pin with internal pull-ups, also serving as ADC input channel 1 using analog power and PCINT9.
25 PC2 (ADC2/PCINT10) bidirectional Port C bit 2 is a bidirectional I/O pin with internal pull-ups, also serving as ADC input channel 2 using analog power and PCINT10.
26 PC3 (ADC3/PCINT11) bidirectional Port C bit 3 is a bidirectional I/O pin with internal pull-ups, also serving as ADC input channel 3 using analog power and PCINT11.
27 PC4 (ADC4/SDA/PCINT12) bidirectional Port C bit 4 is a bidirectional I/O pin with internal pull-ups, also serving as 2-wire serial interface data SDA, ADC input channel 4 using digital power, and PCINT12.
28 PC5 (ADC5/SCL/PCINT13) bidirectional Port C bit 5 is a bidirectional I/O pin with internal pull-ups, also serving as 2-wire serial interface clock SCL, ADC input channel 5 using digital power, and PCINT13.
29 PC6 (RESET/PCINT14) input When the RSTDISBL fuse is unprogrammed this pin is a Reset input, and a low level longer than the minimum pulse length (Table 29-3) generates a Reset while shorter pulses are not ensured to reset; when RSTDISBL is programmed it is an I/O pin with electrical characteristics differing from other Port C pins.
30 PD0 (RXD/PCINT16) bidirectional Port D bit 0 is a bidirectional I/O pin with internal pull-ups, serving as USART receive data input RXD when the USART receiver is enabled, and PCINT16.
31 PD1 (TXD/PCINT17) bidirectional Port D bit 1 is a bidirectional I/O pin with internal pull-ups, serving as USART transmit data output TXD when the USART transmitter is enabled, and PCINT17.
32 PD2 (INT0/PCINT18) bidirectional Port D bit 2 is a bidirectional I/O pin with internal pull-ups, also serving as external interrupt source INT0 and PCINT18.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Temperature -55 125 °C 324
Storage Temperature -65 150 °C 324
Voltage on any pin except RESET with respect to Ground (printed max VCC+0.5 V) -0.5 V 324
Voltage on RESET with respect to Ground -0.5 13 V 324
Maximum Operating Voltage 6 V 324
DC Current per I/O Pin 40 mA 324
DC Current VCC and GND Pins 200 mA 324
Supply voltage (20 MHz speed grade) VCC 2.7 5.5 V ATmega168P-20AU speed grade 20 MHz 420
Operating temperature (industrial range) -40 85 °C Industrial operational range 420
Oscillator Frequency (external clock drive) 1/tCLCL 0 20 MHz VCC = 4.5-5.5V 329
Oscillator Frequency (external clock drive) 1/tCLCL 0 10 MHz VCC = 2.7-5.5V 329
Factory-calibrated internal RC oscillator accuracy (8.0 MHz) -10 10 % 8.0 MHz, VCC 3V, 25C 329
User-calibrated internal RC oscillator accuracy -1 1 % 7.3-8.1 MHz, VCC 2.7-5.5V, -40C to 85C 329
Power-on Reset Threshold Voltage (rising) VPOT 1.1 1.4 1.6 V 330
Power-on Reset Threshold Voltage (falling) VPOT 0.6 1.3 1.6 V 330
RESET Pin Threshold Voltage (printed as multiple of VCC) VRST 0.2 0.9 xVCC 330
Minimum pulse width on RESET Pin tRST 2.5 µs 330
Min Pulse Width on Brown-out Reset tBOD 2 µs 330
Bandgap reference voltage VBG 1 1.1 1.2 V VCC=2.7, TA=25°C 330
Brown-out trigger level VBOT (BODLEVEL 110) VBOT 1.7 1.8 2 V BODLEVEL 2:0 = 110 330
Brown-out trigger level VBOT (BODLEVEL 101) VBOT 2.5 2.7 2.9 V BODLEVEL 2:0 = 101 330
Brown-out trigger level VBOT (BODLEVEL 100) VBOT 4.1 4.3 4.5 V BODLEVEL 2:0 = 100 330
Input Low Voltage, except XTAL1 and RESET pin (printed as multiple of VCC) VIL 0.3 xVCC VCC = 2.4V - 5.5V 324
Input High Voltage, except XTAL1 and RESET pins (printed as multiple of VCC) VIH 0.6 xVCC VCC = 2.4V - 5.5V 324
Input Low Voltage, XTAL1 pin (printed as multiple of VCC) VIL1 0.1 xVCC VCC = 1.8V - 5.5V 324
Input High Voltage, XTAL1 pin (printed as multiple of VCC) VIH1 0.7 xVCC VCC = 2.4V - 5.5V 324
Input Low Voltage, RESET pin (printed as multiple of VCC) VIL2 0.1 xVCC VCC = 1.8V - 5.5V 324
Input High Voltage, RESET pin (printed as multiple of VCC) VIH2 0.9 xVCC VCC = 1.8V - 5.5V 324
Input Low Voltage, RESET pin as I/O (printed as multiple of VCC) VIL3 0.3 xVCC VCC = 2.4V - 5.5V 324
Input High Voltage, RESET pin as I/O (printed as multiple of VCC) VIH3 0.6 xVCC VCC = 2.4V - 5.5V 324
Output Low Voltage except RESET pin VOL 0.9 V IOL = 20 mA, VCC = 5V 324
Output Low Voltage except RESET pin VOL 0.6 V IOL = 10 mA, VCC = 3V 324
Output High Voltage except Reset pin VOH 4.2 V IOH = -20 mA, VCC = 5V 324
Output High Voltage except Reset pin VOH 2.3 V IOH = -10 mA, VCC = 3V 324
Input Leakage Current I/O Pin (absolute value) IIL 1 µA VCC = 5.5V, pin low 324
Power Supply Current, Active ICC 0.3 0.5 mA Active 1 MHz, VCC = 2V 327
Power Supply Current, Active ICC 1.8 2.5 mA Active 4 MHz, VCC = 3V 327
Power Supply Current, Active ICC 6.7 9 mA Active 8 MHz, VCC = 5V 327
Power Supply Current, Idle ICC 0.06 0.15 mA Idle 1 MHz, VCC = 2V 327
Power Supply Current, Idle ICC 0.4 0.7 mA Idle 4 MHz, VCC = 3V 327
Power Supply Current, Idle ICC 1.7 2.7 mA Idle 8 MHz, VCC = 5V 327
Power Supply Current, Power-save ICC 0.8 1.6 µA 32 kHz TOSC enabled, VCC = 1.8V 327
Power Supply Current, Power-save ICC 0.9 2.6 µA 32 kHz TOSC enabled, VCC = 3V 327
Power Supply Current, Power-down ICC 4.6 8 µA WDT enabled, VCC = 3V 327
Power Supply Current, Power-down ICC 0.1 2 µA WDT disabled, VCC = 3V 327
2-wire Input Low-voltage (printed as multiple of VCC) VIL 0.3 xVCC 333
2-wire Input High-voltage (printed as multiple of VCC) VIH 0.7 xVCC 333
2-wire Output Low-voltage VOL 0.4 V 3 mA sink current 333
Rise time for both SDA and SCL tr 300 ns 333
Output fall time from VIHmin to VILmax tof 250 ns 10 pF < Cb < 400 pF 333
Input current each I/O pin Ii -10 10 µA 0.1VCC < Vi < 0.9VCC 333
Capacitance for each I/O pin Ci 10 pF 333
SCL Clock Frequency fSCL 0 400 kHz fCK > max(16fSCL, 250kHz) 333
Data hold time tHD;DAT 0 3.45 µs fSCL ≤ 100 kHz 333
Data setup time tSU;DAT 250 ns fSCL ≤ 100 kHz 333

CAD (KiCad official)

  • Symbol: ATMEGA168P-20AU
  • Footprint: Package_QFP:TQFP-32_7x7mm_P0.8mm
  • 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: atmega168p-20au-etched.step / atmega168p-20au-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega168p-20au.step / atmega168p-20au.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (436 pp, sha256 aab081a362918ab9, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF