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README

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LT3796EFE#TRPBF

Analog Devices · LED Drivers · TSSOP-28-EP

LT3796EFE#TRPBF from Analog Devices, in a TSSOP-28-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ISP input Positive terminal connection for the LED current-feedback resistor RLED, which also serves as the positive rail for the TG pin driver.
2 ISN input Negative terminal connection for the LED current-feedback resistor RLED.
3 TG output Top gate driver output that drives a series PMOS between VISP and (VISP - 7V) when VISP > 7V, with an internal 7V clamp limiting VGS; leave unconnected if not used.
4 GND power_in Ground pin that also senses the negative terminal of the N-channel MOSFET source current-sense resistor for the control loop.
5 ISMON output LED current report pin with VISMON = ILED • RLED • 4, driven to ground when PWM is low; leave unconnected if not used.
6 FB2 input Voltage loop feedback 2 regulated to 1.25 V through the DC/DC converter; on the LT3796 it pulls TG high and drives GATE low if driven above 1.3 V, and should be connected to GND if not used.
7 FB1 input Voltage loop feedback 1 for constant-voltage regulation or open-LED detection, regulated to 1.25 V nominal; if driven above 1.3 V it asserts FAULT, pulls GATE low and drives TG high, and must not be left open.
8 VC passive Transconductance error amplifier output used for loop compensation, high impedance when PWM is low; connect a capacitor to GND (series resistor recommended) and do not leave open.
9 CTRL input Current-sense threshold adjustment where V(ISP-ISN) = 0.25 • VCTRL plus offset for 0.1 V < VCTRL < 1 V and is held at 250 mV full scale above 1.2 V; connect to VREF for the default 250 mV threshold and pull to GND for zero LED current.
10 VREF power_in Voltage reference output, typically 2.015 V, that can supply up to 100 µA to a resistor divider on the CTRL pin.
11 SS bidirectional Soft-start and fault-timer pin with a 28 µA (typical) pull-up to an internal 2.5 V rail, which must be discharged below 0.2 V to reinitiate a soft-start cycle after a fault.
12 RT passive Switching frequency adjustment pin set by a resistor to GND per the datasheet curve or Table 2, and must not be left open.
13 SYNC input On the LT3796 it synchronizes the internal oscillator to a 50% duty-cycle logic signal, with RT set for a frequency 20% slower than the SYNC frequency, and it should be tied to GND if not used.
14 PWM input PWM input where a low signal turns off switching, idles the oscillator and drives TG high, and which should be tied to VREF if not used.
15 FAULT output Open-collector pull-down that asserts on FB1 overvoltage (VFB1 > 1.3 V), INTVCC undervoltage, LED overcurrent (V(ISP-ISN) > 375 mV) or thermal shutdown, and is latched during PWM low.
16 VMODE output Open-collector pull-down that asserts when FB1 is above 1.19 V (typical) and V(ISP-ISN) is below 25 mV (typical), and requires an external pull-up resistor to function.
17 GND power_in Ground pin that also serves as a current-sense input for the control loop.
18 SENSE input Kelvin-connected current-sense input for the positive terminal of the switch current-sense resistor RSENSE in the N-channel MOSFET source, with the negative terminal Kelvin-connected to the IC GND plane.
19 GATE output N-channel MOSFET gate driver output that switches between INTVCC and GND and is driven to GND during shutdown, fault or idle states.
20 INTVCC power_out Regulated 7.7 V (typical) supply from VIN for internal loads, the GATE driver and the TG driver, which must be bypassed with a 4.7 µF capacitor placed close to the pin and connected directly to VIN only if VIN is always ≤ 7 V.
21 GND power_in Ground pin that also serves as a current-sense input for the control loop.
22 GND power_in Ground pin that also serves as a current-sense input for the control loop.
23 VIN power_in Input supply pin that must be locally bypassed with a 0.22 µF (or larger) capacitor placed close to the IC.
24 EN/UVLO input Enable and undervoltage lockout pin with an accurate 1.22 V falling threshold and a 3 µA pull-down for externally programmed hysteresis; tie to 0.4 V or less to disable the device and reduce VIN quiescent current below 1 µA.
25 VS power_in Current-sense amplifier power supply pin that supplies the current-sense amplifier and can operate from 3 V to 100 V.
26 CSN input Negative current-sense input terminal that remains functional for voltages up to 100 V and is typically connected to VS and CSP.
27 CSP input Positive current-sense input terminal that the internal amplifier sinks current from to regulate it to the CSN potential, with RIN1 from VIN setting ICSOUT = VSNS/RIN1.
28 CSOUT output Current-sense amplifier output that sources the current drawn from CSP and is typically connected to an external resistor to GND.
29 GND power_in Exposed pad, internally GND, which must be soldered directly to the ground plane.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-28-EP
Category LED Drivers
Pins 29

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VREF Voltage VREF 1.97 2.015 2.06 V -100µA ≤ IREF ≤ 10µA 3
SENSE Current Limit Threshold 100 113 125 mV 3
Full Scale LED Current Sense Threshold V(ISP-ISN) 243 250 257 mV ISP = 48V, CTRL ≥ 1.2V 3
9/10th LED Current Sense Threshold V(ISP-ISN) 220 225 230 mV CTRL = 1V, ISP = 48V 3
1/2 LED Current Sense Threshold V(ISP-ISN) 119 125 131 mV CTRL = 0.6V, ISP = 48V 3
1/10th LED Current Sense Threshold V(ISP-ISN) 16 25 32 mV CTRL = 0.2V, ISP = 48V 3
ISP/ISN Current Monitor Voltage VISMON 0.96 1 1.04 V V(ISP-ISN) = 250mV, ISP = 48V, -50µA < IISMON < 0 µA 3
ISP/ISN Over Current Protection Threshold V(ISP-ISN) 360 375 390 mV ISN = 48V 3
ISP/ISN Current Sense Amplifier Input Common Mode Range 0 100 V 3
VC Standby Input Bias Current -20 20 nA PWM = 0V 3
FB1, FB2 Regulation Voltage VFB 1.23 1.25 1.27 V ISP = ISN = 48V 3
FB1, FB2 Regulation Voltage VFB 1.238 1.25 1.264 V ISP = ISN = 48V 3
FB1 Amplifier gm gm 450 600 750 µS 3
FB2 Amplifier gm gm 130 170 210 µS 3
Power Supply Voltage Range VS 3 100 V 4
CSA Input Voltage Common Mode Range VCSP and VCSN 2.5 100 V 4
Input Voltage Offset V(CSP-CSN) -3 0 3 mV VSNS = 100mV, VS = 48V (Note 5) 4
INTVCC Regulation Voltage INTVCC 7.4 7.7 8 V 4
INTVCC Undervoltage Lockout 3.8 4 4.1 V 4
Switching Frequency 85 105 125 kHz RT = 82.5k 4
Switching Frequency 340 400 480 kHz RT = 19.6k 4
Switching Frequency 900 1000 1150 kHz RT = 6.65k 4
PWM Input Threshold Rising 0.96 1 1.04 V 4
EN/UVLO Threshold Voltage Falling 1.185 1.22 1.25 V 4
EN/UVLO Pin Bias Current Low 2.5 3 3.8 µA EN/UVLO = 1.15V 4
VIN, VS VIN, VS 100 V 2
EN/UVLO EN/UVLO 100 V 2
ISP, ISN ISP, ISN 100 V 2
CSP, CSN CSP, CSN 100 V 2
VS - CSP, VS - CSN VS - CSP, VS - CSN -0.3 4 V 2
PWM, VMODE, FAULT PWM, VMODE, FAULT 12 V 2
FB1, FB2, SYNC (LT3796), TGEN (LT3796-1) FB1, FB2, SYNC, TGEN 8 V 2
CTRL CTRL 15 V 2
ISMON, CSOUT ISMON, CSOUT 5 V 2
VC, VREF, SS VC, VREF, SS 3 V 2
RT RT 2 V 2
Operating Junction Temperature Range TJ -40 125 °C LT3796E/LT3796I (Note 4) 2
Storage Temperature Range -65 150 °C 2
Maximum Junction Temperature TJMAX 150 °C 2
INTVCC Operating Maximum INTVCC 8 V Note 3 5
Junction-to-Ambient Thermal Resistance θJA 30 °C/W 2
Junction-to-Case Thermal Resistance θJC 10 °C/W 2

CAD (KiCad official)

  • Symbol: LT3796EFE#TRPBF
  • Footprint: Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm
  • 3D model: TSSOP-28-EP (KiCad packages3D, STEP)
  • 3D model files: lt3796efe-trpbf-etched.step / lt3796efe-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt3796efe-trpbf.step / lt3796efe-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (36 pp, sha256 f867a3e2b3394db1, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF