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STM32L151CCU6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L151CCU6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)
STM32L151CCU6 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VLCD | power_in | LCD power supply rail voltage 1.65 to 3.6 V, applicable to STM32L152xC devices only (connect to VDD for STM32L151xC) |
| 2 | PC13-WKUP2 | bidirectional | Port C bit 13 general-purpose I/O with 5V tolerance and wakeup/RTC tamper/timestamp functionality |
| 3 | PC14-OSC32_IN | bidirectional | Port C bit 14 configured as 32 kHz oscillator input at 3.3V logic levels when LSE enabled |
| 4 | PC15-OSC32_OUT | bidirectional | Port C bit 15 configured as 32 kHz oscillator output at 3.3V logic levels when LSE enabled |
| 5 | PH0-OSC_IN | bidirectional | Port H bit 0 configured as high-speed oscillator input at 3.3V logic levels when HSE enabled |
| 6 | PH1-OSC_OUT | bidirectional | Port H bit 1 configured as high-speed oscillator output at 3.3V logic levels when HSE enabled |
| 7 | NRST | bidirectional | Active-low bidirectional reset pin with embedded weak pull-up resistor requiring 0.1µF debouncing capacitor |
| 8 | VSSA | power_in | Analog ground supply reference pin, must be connected to system ground |
| 9 | VDDA | power_in | Analog power supply 1.8 to 3.6 V requiring external 100nF decoupling capacitor |
| 10 | PA0-WKUP1 | bidirectional | Port A bit 0 with 5V tolerance supporting timer/USART2/wakeup and ADC/comparator functions |
| 11 | PA1 | bidirectional | Port A bit 1 with 5V tolerance supporting timer/USART2/ADC/comparator and OpAmp functionality |
| 12 | PA2 | bidirectional | Port A bit 2 with 5V tolerance supporting timer/USART2/ADC and comparator functions |
| 13 | PA3 | bidirectional | Port A bit 3 with 3.3V logic supporting timer/USART2/LCD segment and ADC/comparator functions |
| 14 | PA4 | bidirectional | Port A bit 4 with 3.3V logic supporting SPI1/I2S chip select and DAC1 output |
| 15 | PA5 | bidirectional | Port A bit 5 with 3.3V logic supporting SPI1 serial clock and DAC2 output |
| 16 | PA6 | bidirectional | Port A bit 6 with 5V tolerance supporting timer/SPI1 MISO/LCD segment and ADC/comparator |
| 17 | PA7 | bidirectional | Port A bit 7 with 5V tolerance supporting timer/SPI1 MOSI/LCD segment and ADC/comparator |
| 18 | PB0 | bidirectional | Port B bit 0 with 3.3V logic supporting timer/LCD segment/ADC/comparator and OpAmp output |
| 19 | PB1 | bidirectional | Port B bit 1 with 5V tolerance supporting timer/LCD segment and ADC/comparator |
| 20 | PB2 | bidirectional | Port B bit 2 with 5V tolerance for BOOT1 mode selection and LCD voltage rail function |
| 21 | PB10 | bidirectional | Port B bit 10 with 5V tolerance supporting I2C2 clock/USART3 transmit and LCD segment |
| 22 | PB11 | bidirectional | Port B bit 11 with 5V tolerance supporting I2C2 data/USART3 receive and LCD segment |
| 23 | VSS_1 | power_in | Power supply ground reference pin, must be connected to system ground |
| 24 | VDD_1 | power_in | Core power supply 1.65 to 3.6 V requiring external 1µF and 100nF decoupling capacitors |
| 25 | PB12 | bidirectional | Port B bit 12 with 5V tolerance supporting timer/SPI2/I2S chip select/USART3 and LCD segment |
| 26 | PB13 | bidirectional | Port B bit 13 with 5V tolerance supporting timer/SPI2/I2S clock/USART3 and ADC input |
| 27 | PB14 | bidirectional | Port B bit 14 with 5V tolerance supporting timer/SPI2 MISO/USART3 and ADC input |
| 28 | PB15 | bidirectional | Port B bit 15 with 5V tolerance supporting timer/SPI2 MOSI/I2S data and LCD segment |
| 29 | PA8 | bidirectional | Port A bit 8 with 5V tolerance supporting microcontroller clock output/USART1 clock and LCD COM |
| 30 | PA9 | bidirectional | Port A bit 9 with 5V tolerance for USART1 transmit and LCD COM function |
| 31 | PA10 | bidirectional | Port A bit 10 with 5V tolerance for USART1 receive and LCD COM function |
| 32 | PA11 | bidirectional | Port A bit 11 with 5V tolerance supporting USART1 CTS/SPI1 MISO and USB pull-down |
| 33 | PA12 | bidirectional | Port A bit 12 with 5V tolerance supporting USART1 RTS/SPI1 MOSI and USB pull-up |
| 34 | PA13 | bidirectional | Port A bit 13 with 5V tolerance for JTAG/SWD SWDIO serial wire debug interface pin |
| 35 | VSS_2 | power_in | Power supply ground reference pin, must be connected to system ground |
| 36 | VDD_2 | power_in | Core power supply 1.65 to 3.6 V requiring external 1µF and 100nF decoupling capacitors |
| 37 | PA14 | bidirectional | Port A bit 14 with 5V tolerance for JTAG/SWD SWCLK serial wire debug interface pin |
| 38 | PA15 | bidirectional | Port A bit 15 with 5V tolerance supporting JTAG TDI/timer/SPI1,3 select and I2S3 functionality |
| 39 | PB3 | bidirectional | Port B bit 3 with 5V tolerance supporting JTAG TDO/timer/SPI1,3 clock and I2S3 clock |
| 40 | PB4 | bidirectional | Port B bit 4 with 5V tolerance for JTAG nTRST and SPI1/3 MISO functions |
| 41 | PB5 | bidirectional | Port B bit 5 with 5V tolerance supporting I2C1 alert/timer/SPI1,3 MOSI and I2S3 data |
| 42 | PB6 | bidirectional | Port B bit 6 with 5V tolerance supporting I2C1 clock/timer and USART1 transmit |
| 43 | PB7 | bidirectional | Port B bit 7 with 5V tolerance supporting I2C1 data/timer and USART1 receive |
| 44 | BOOT0 | input | Dedicated boot selection input pin read at power-up to determine bootloader or flash execution |
| 45 | PB8 | bidirectional | Port B bit 8 with 5V tolerance supporting I2C1 clock/timer and LCD segment |
| 46 | PB9 | bidirectional | Port B bit 9 with 5V tolerance supporting I2C1 data/timer and LCD COM function |
| 47 | VSS_3 | power_in | Power supply ground reference pin, must be connected to system ground |
| 48 | VDD_3 | power_in | Core power supply 1.65 to 3.6 V requiring external 1µF and 100nF decoupling capacitors |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFQFPN-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
STM32L151CCU6 - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32l151ccu6-etched.step/stm32l151ccu6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l151ccu6.step/stm32l151ccu6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (136 pp, sha256
5e6d5674cd06c108, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).