component
HC32F448MATI-LQFP80
Public Made by Adomby adom
XHSC Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHC32F448MATI-LQFP80
XHSC · Microcontrollers (MCU/MPU/SOC) · LQFP-80(12x12)
HC32F448MATI-LQFP80 from XHSC, in a LQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC3_IN0) must not exceed AVCC/VREFH; alternate functions include EIRQ2, TRACECLK and TMR4_2_PCT. |
| 2 | PE3 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC3_IN1) must not exceed AVCC/VREFH; alternate functions include EIRQ3, TRACED0 and USART4_CK. |
| 3 | PE4 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC3_IN2) must not exceed AVCC/VREFH; alternate functions include EIRQ4, TRACED1, CTCREF and USART6_CK. |
| 4 | PH2 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ2, TRACED2, FCMREF and USART4_CK. |
| 5 | PC13 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ13, TRACED3, RTC_OUT and VCOUT4. |
| 6 | PC14/XTAL32_IN | bidirectional | Multiplexed pin: XTAL32_IN is the input of the external 32.768kHz secondary oscillator; as GPIO it is 5V-tolerant with alternate function EIRQ14. |
| 7 | PC15/XTAL32_OUT | bidirectional | Multiplexed pin: XTAL32_OUT is the output of the external 32.768kHz secondary oscillator; as GPIO it is 5V-tolerant with alternate functions EIRQ15 and EXMC_ALE. |
| 8 | PH0/XTAL_IN | bidirectional | Multiplexed pin: XTAL_IN is the external main clock oscillator interface; as GPIO it is 5V-tolerant with alternate functions EIRQ0 and TMR4_3_OXL. |
| 9 | PH1/XTAL_EXT/XTAL_OUT | bidirectional | Multiplexed pin: XTAL_EXT is the external clock input and XTAL_OUT the external main oscillator interface; as GPIO it is 5V-tolerant with alternate functions EIRQ1 and TMR4_3_CLK. |
| 10 | NRST | input | Reset pin, active low; connect a resistor to VCC (pull-up) when not used. |
| 11 | PC0 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC12_IN10) must not exceed AVCC/VREFH; alternate functions include CMP3_INP3, CMP4_INP3, EIRQ0 and EXMC_RB0. |
| 12 | PC1 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC12_IN11) must not exceed AVCC/VREFH; alternate functions include EIRQ1, EXMC_CLK and EVNTP301. |
| 13 | PC2 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC1_IN12) must not exceed AVCC/VREFH; alternate functions include EIRQ2, EMB_IN3 and EXMC_CE4. |
| 14 | PC3 | bidirectional | Not 5V-tolerant GPIO: input must not exceed VCC; analog input (ADC1_IN13, CMP1_INM2) must not exceed AVCC/VREFH; alternate functions include EIRQ3 and MCO_2. |
| 15 | VCC | power_in | Power supply, connect to 1.8V-3.6V and place decoupling capacitors close to VSS. |
| 16 | AVSS/VREFL | power_in | Analog ground / low reference voltage; connect to VSS when no separate analog supply is used and do not leave floating. |
| 17 | AVCC/VREFH | power_in | Analog supply, same voltage as VCC (1.8V-3.6V) and also high reference voltage; connect to VCC when no separate analog supply is used and do not leave floating. |
| 18 | PA0 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC1_IN0, CMP1_INP1) must not exceed AVCC/VREFH; alternate functions include EIRQ0, WKUP0_0 and SPI1_NSS1. |
| 19 | PA1 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC1_IN1, CMP1_INP2) must not exceed AVCC/VREFH; alternate functions include EIRQ1, SPI1_NSS2 and USART5_CTS. |
| 20 | PA2 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC1_IN2, CMP1_INP3) must not exceed AVCC/VREFH; alternate functions include EIRQ2, SPI1_NSS3 and USART6_CTS. |
| 21 | PA3 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC1_IN3, CMP1_INP4, CMP2_INP4) must not exceed AVCC/VREFH; alternate functions include EIRQ3, USART5_CK and USART3_RTS. |
| 22 | VSS | power_in | Power ground, connect to 0 V. |
| 23 | VCC | power_in | Power supply, connect to 1.8V-3.6V and place decoupling capacitors close to VSS. |
| 24 | PA4 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC12_IN4, CMP2_INP1, CMP3_INP4, DAC_OUT1) must not exceed AVCC/VREFH; alternate functions include EIRQ4 and KEYOUT0. |
| 25 | PA5 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC12_IN5, CMP2_INP2, DAC_OUT2) must not exceed AVCC/VREFH; alternate functions include EIRQ5 and KEYOUT1. |
| 26 | PA6 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC123_IN6, CMP2_INP3) must not exceed AVCC/VREFH; alternate functions include EIRQ6, EMB_IN2 and KEYOUT2. |
| 27 | PA7 | bidirectional | Not 5V-tolerant GPIO: input must not exceed VCC; analog input (ADC123_IN7, CMP1234_INM1) must not exceed AVCC/VREFH; alternate functions include EIRQ7, EMB_IN3 and KEYOUT3. |
| 28 | PC4 | bidirectional | Not 5V-tolerant GPIO: input must not exceed VCC; analog input (ADC1_IN14, CMP2_INM2) must not exceed AVCC/VREFH; alternate functions include EIRQ4 and USART1_CK. |
| 29 | PC5 | bidirectional | Not 5V-tolerant GPIO: input must not exceed VCC; analog input (ADC1_IN15, CMP3_INM2) must not exceed AVCC/VREFH; alternate functions include EIRQ5 and EVNTP305. |
| 30 | PB0 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC123_IN8, CMP3_INP1) must not exceed AVCC/VREFH; alternate functions include EIRQ0, USART4_CK and KEYOUT4. |
| 31 | PB1 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC123_IN9, CMP4_INP2) must not exceed AVCC/VREFH; alternate functions include EIRQ1, WKUP0_1, QSPI_NSS and KEYOUT5. |
| 32 | PB2/PVD2EXINP | bidirectional | 5V-tolerant GPIO; PVD2EXINP is the external input comparison voltage for PVD2 (PVD2 monitors this pin when PVD2LVL is 0b111); alternate functions include EIRQ2, WKUP0_2 and VCOUT. |
| 33 | PE12 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC3_IN3) must not exceed AVCC/VREFH; alternate functions include EIRQ12, SPI1_NSS1 and EXMC_DATA10. |
| 34 | PE13 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC3_IN4) must not exceed AVCC/VREFH; alternate functions include EIRQ13, SPI1_NSS2 and EXMC_DATA11. |
| 35 | PE14 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC3_IN5) must not exceed AVCC/VREFH; alternate functions include EIRQ14, ADTRG1 and SPI1_NSS3. |
| 36 | PE15 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC3_IN10) must not exceed AVCC/VREFH; alternate functions include EIRQ15, ADTRG3 and USART4_CK. |
| 37 | PB10 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V, analog input (ADC3_IN11) must not exceed AVCC/VREFH; alternate functions include EIRQ10, ADTRG2 and QSPI_IO2. |
| 38 | VCAP_1 | passive | Core voltage pin: connect a capacitor close to a VSS pin to stabilize the core voltage (see Electrical Characteristics for value). |
| 39 | VSS | power_in | Power ground, connect to 0 V. |
| 40 | VCC | power_in | Power supply, connect to 1.8V-3.6V and place decoupling capacitors close to VSS. |
| 41 | PB12 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ12, VCOUT1, QSPI_IO1 and USART5_CTS. |
| 42 | PB13 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ13, VCOUT2, QSPI_IO0 and USART5_RTS. |
| 43 | PB14 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ14, VCOUT3, QSPI_SCK and USART6_CTS. |
| 44 | PB15 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ15, RTC_OUT, USART3_CK and USART6_RTS. |
| 45 | PD8 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ8, QSPI_IO0 and KEYOUT7. |
| 46 | PD9 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ9, QSPI_IO1 and KEYOUT6. |
| 47 | PD10 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ10, QSPI_IO2 and KEYOUT5. |
| 48 | PD11 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ11, QSPI_IO3 and KEYOUT4. |
| 49 | PC6 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ6, CTCREF, QSPI_SCK and KEYOUT3. |
| 50 | PC7 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ7, QSPI_NSS and KEYOUT2. |
| 51 | PC8 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ8, USART3_CK, KEYOUT1 and EXMC_DATA14. |
| 52 | PC9 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ9, MCO_2, KEYOUT0 and EXMC_DATA15. |
| 53 | PA8 | bidirectional | Not 5V-tolerant GPIO: input must not exceed VCC; analog input (CMP4_INM2) must not exceed AVCC/VREFH; alternate functions include EIRQ8, WKUP2_0 and MCO_1. |
| 54 | PA9 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; analog input (CMP4_INP1) must not exceed AVCC/VREFH; alternate functions include EIRQ9, WKUP2_1 and CTCREF. |
| 55 | PA10 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; analog input (CMP4_INP4) must not exceed AVCC/VREFH; alternate functions include EIRQ10, WKUP2_2, CTCREF and USART6_CK. |
| 56 | PA11 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ11, WKUP2_3, EMB_IN1, USART5_CK and USART3_RTS. |
| 57 | PA12 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ12, WKUP3_0, USART6_CK, USART3_CTS and EXMC_DATA6. |
| 58 | PA13/JTMS_SWDIO | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; JTMS_SWDIO is the serial-wire/JTAG debug data pin; alternate functions include EIRQ13, WKUP3_1 and SPI2_NSS1. |
| 59 | VSS | power_in | Power ground, connect to 0 V. |
| 60 | VCC | power_in | Power supply, connect to 1.8V-3.6V and place decoupling capacitors close to VSS. |
| 61 | PA14/JTCK_SWCLK | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; JTCK_SWCLK is the in-circuit debug clock pin; alternate functions include EIRQ14, WKUP3_2, SPI2_NSS2 and EXMC_CE0. |
| 62 | PA15/JTDI | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; JTDI is the JTAG debug data input; alternate functions include EIRQ15, WKUP3_3 and SPI2_NSS3. |
| 63 | PC10 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ10, TMRA_5_PWM1/CLKA and TMR4_2_OXL. |
| 64 | PC11 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ11, TMRA_5_PWM2/CLKB and TMR4_2_OXH. |
| 65 | PC12 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ12, TMRA_5_PWM3 and TMR4_1_OXL. |
| 66 | PD0 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ0, VCOUT, TMR4_2_OUL and TMRA_5_PWM4. |
| 67 | PD1 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ1, TMR4_2_OWH, TMR4_3_OWH and TMRA_3_TRIG. |
| 68 | PD2 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ2, TMR4_1_OXH, TMR4_2_OVH and TMRA_2_PWM4. |
| 69 | PB3/JTDO_SWO | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; JTDO_TRACESWO is the JTAG/SWO trace output; alternate functions include EIRQ3, WKUP0_3 and FCMREF. |
| 70 | PB4/JTRST | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; NJTRST is the JTAG reset input; alternate functions include EIRQ4, WKUP1_0 and TMR4_3_OWL. |
| 71 | PB5 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ5, WKUP1_1, ADTRG3 and USART4_CK. |
| 72 | PB6 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ6, WKUP1_2, ADTRG2 and TMR4_3_OVL. |
| 73 | PB7 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ7, WKUP1_3, ADTRG1 and EXMC_ADV. |
| 74 | PB11/MD | bidirectional | Mode input MD: must be held low when NRST is released (recommended 4.7kΩ pull-down to VSS); the pin is also GPIO PB11 with function PLU3_INC/PLU2_OUT. |
| 75 | PB8 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ8, USART5_CK, KEYOUT7 and EXMC_WE. |
| 76 | PB9 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ9, EMB_IN4, SPI2_NSS1, KEYOUT6 and EXMC_OE. |
| 77 | PE0 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ0, MCO_1 and SPI2_NSS2. |
| 78 | PE1 | bidirectional | 5V-tolerant GPIO: digital input must not exceed 5V; alternate functions include EIRQ1, MCO_2 and SPI2_NSS3. |
| 79 | VSS | power_in | Power ground, connect to 0 V. |
| 80 | VCC | power_in | Power supply, connect to 1.8V-3.6V and place decoupling capacitors close to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XHSC |
| Package | LQFP-80(12x12) |
| Category | Embedded Processors & Controllers |
| Pins | 80 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| External main supply voltage (VCC, AVCC) VCC-VSS | VCC-VSS | -0.3 | 4 | V | 40 | ||
| Input voltage on pins other than PA7, PA8, PC3~PC5 | VIN | 5.8 | V | 最小值 VSS-0.3；最大值 VCC+4.0（最大 5.8V） | 40 | ||
| Input voltage on PA7, PA8, PC3~PC5 | VIN | 4 | V | 最小值 VSS-0.3；最大值 VCC+0.7（最大 4.0V） | 40 | ||
| Voltage difference between different ground pins | /VSSx-VSS/ | 50 | mV | 40 | |||
| Total current into all VCCx supply lines (source) | ∑IVCC | 240 | mA | 40 | |||
| Total current out of all VSSx ground lines (sink) | ∑IVSS | -240 | mA | 40 | |||
| Maximum current into each VCCx supply line | IVCC | 100 | mA | 40 | |||
| Maximum current out of each VSSx ground line | IVSS | -100 | mA | 40 | |||
| Output sink current on any I/O and control pin | IIO | 20 | mA | 40 | |||
| Output source current on any I/O and control pin | IIO | -20 | mA | 40 | |||
| Total output sink current, all I/O and control pins | ∑IIO | 120 | mA | 适用于 64PINs 及以上封装 | 40 | ||
| Total output source current, all I/O and control pins | ∑IIO | -120 | mA | 适用于 64PINs 及以上封装 | 40 | ||
| Storage temperature range | TSTG | -65 | 150 | ℃ | 40 | ||
| Maximum junction temperature range | TJ | -40 | 125 | ℃ | 40 | ||
| Internal AHB clock frequency, high-speed mode | fHCLK | 200 | MHz | PWRC2.DVS=0b11 PWRC3.DDAS=0b1111 | 41 | ||
| Internal AHB clock frequency, ultra-low-speed mode | fHCLK | 8 | MHz | PWRC2.DVS=0b10 PWRC3.DDAS=0b0000 | 41 | ||
| Standard operating voltage | VCC | 1.8 | 3.6 | V | 41 | ||
| Analog operating voltage | VAVCC | 1.8 | 3.6 | V | 41 | ||
| Input voltage on 5V-tolerant pins | VIN | -0.3 | 5.5 | V | 2V≤VCC≤3.6V 2V≤VAVCC≤3.6V | 41 | |
| Input voltage on 5V-tolerant pins at low supply | VIN | -0.3 | 5.2 | V | VCC<2V VAVCC<2V | 41 | |
| Input voltage on non-5V-tolerant pins (PA7/PA8/PC3~5) | VIN | -0.3 | V | 41 | |||
| Operating ambient temperature | TA | -40 | 105 | ℃ | 41 | ||
| VCC rise time rate | tVCC | 20 | 20000 | µs/V | 41 | ||
| VCC fall time rate | 20 | 20000 | µs/V | 41 | |||
| BOR monitoring voltage | VBOR | 1.7 | 1.9 | 2.1 | V | ICG1.BOR_LEV[1:0]=0b00 | 42 |
| BOR monitoring voltage | VBOR | 2.1 | 2.3 | 2.5 | V | ICG1.BOR_LEV[1:0]=0b11 | 42 |
| PVD1 monitoring voltage | VPVD1 | 1.8 | 2 | 2.2 | V | PVD1LVL[2:0]=0b000 | 42 |
| PVD1 monitoring voltage | VPVD1 | 2.73 | 2.95 | 3.17 | V | PVD1LVL[2:0]=0b111 | 42 |
| PVD2 monitoring voltage | VPVD2 | 1.9 | 2.1 | 2.3 | V | PVD2LVL[2:0]=0b000 | 42 |
| PVD2 monitoring voltage (external PVDEXINP input) | VPVD2 | 0.9 | 1.1 | 1.3 | V | PVD2LVL[2:0]=0b111 | 42 |
| POR rising threshold | VPOR | 1.56 | 1.68 | 1.8 | V | 上升沿 | 42 |
| PDR falling threshold | VPDR | 1.52 | 1.64 | 1.76 | V | 下降沿 | 42 |
| Regulator power-on inrush current (POR or wake from standby) | IRUSH | 100 | 150 | mA | 42 | ||
| NRST minimum reset pulse width | TNRST | 10 | µs | 42 | |||
| PVD1 reset release time | TIPVD1 | 300 | 380 | 460 | µs | 42 | |
| NRST reset release time | TINRST | 25 | 35 | 50 | µs | 42 | |
| Power-on reset release time | TRSTPOR | 2500 | 3000 | µs | 43 | ||
| ICC_RUN, all module clocks OFF, 200 MHz | ICC_RUN | 33 | mA | while(1),全模块时钟 OFF fHCLK=200MHz TA=105°C VCC=1.8~3.6V | 44 | ||
| ICC_RUN, all module clocks ON, 200 MHz block | ICC_RUN | 48 | mA | while(1),全模块时钟 ON | 44 | ||
| ICC_SLEEP, all module clocks ON, 200 MHz block | ICC_SLEEP | 39 | mA | 全模块时钟 ON | 44 | ||
| ICC_RUN, all module clocks ON, 8 MHz ultra-low-speed block | ICC_RUN | 10 | mA | while(1),全模块时钟 ON | 45 | ||
| ICC_STP (stop mode), STPDAS=0b00 | ICC_STP | 6.5 | mA | PWC_PWRC1.STPDAS=0b00 TA=105°C VCC=1.8~3.6V | 46 | ||
| ICC_STP (stop mode), STPDAS=0b11 | ICC_STP | 6.2 | mA | PWC_PWRC1.STPDAS=0b11 | 46 | ||
| ICC_PD power-down mode 1 at 85°C | ICC_PD | 20 | µA | 掉电模式 1 TA=85°C VCC=1.8~3.6V | 47 | ||
| ICC_PD power-down mode 1 at 105°C | ICC_PD | 31 | µA | 掉电模式 1 TA=105°C VCC=1.8~3.6V | 47 | ||
| User external clock source frequency | fXTAL_EXT | 1 | 25 | MHz | 48 | ||
| XTAL oscillator frequency | fXTAL_IN | 4 | 25 | MHz | 49 | ||
| XTAL accuracy | AXTAL | -500 | 500 | ppm | 49 | ||
| XTAL32 accuracy | AXTAL32 | -500 | 500 | ppm | 50 | ||
| HRC frequency accuracy | -2 | 2 | % | TA=-40~105℃ | 51 | ||
| HRC oscillator stabilization time | tst(HRC) | 15 | µs | 51 | |||
| MRC frequency | fMRC | 7.2 | 8 | 8.8 | MHz | 51 | |
| LRC frequency | fLRC | 27.853 | 32.768 | 37.683 | kHz | 51 | |
| SWDTLRC frequency | fSWDTLRC | 9 | 10 | 11 | kHz | 51 | |
| PLL PFD input clock | fPLL_IN | 4 | 25 | MHz | 52 | ||
| PLL multiplier output clock | fPLL_OUT | 37.5 | 600 | MHz | 52 | ||
| PLL VCO output | fVCO_OUT | 600 | 1200 | MHz | 52 | ||
| I/O input leakage current | ILKG | 1 | µA | VSS≤VIN≤VCC | 54 | ||
| Weak pull-up equivalent resistance | RPU | 10 | 30 | 150 | kΩ | VIN=VSS 1.8≤VCC≤3.6 | 54 |
| Weak pull-down equivalent resistance | RPD | 5 | 20 | 50 | kΩ | VIN=VCC 1.8≤VCC≤3.6 | 54 |
CAD (KiCad official)
- Symbol:
HC32F448MATI-LQFP80 - Footprint:
Package_QFP:LQFP-80_12x12mm_P0.5mm - 3D model: LQFP-80(12x12) (KiCad packages3D, STEP)
- 3D model files:
hc32f448mati-lqfp80-etched.step/hc32f448mati-lqfp80-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hc32f448mati-lqfp80.step/hc32f448mati-lqfp80.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XHSC datasheet (94 pp, sha256
69113ad72760a1d2, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).