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BQ2205LYPWR

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by Ray

Texas Instruments SRAM, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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BQ2205LYPWR

Texas Instruments · SRAM · TSSOP-16

BQ2205LYPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input SRAM bank select input. Chooses which conditioned chip-enable output (CECON1 or CECON2) receives the CE input during power-valid operation. Typically tied to a high-order address line.
2 NC unconnected No connect. Must be left floating.
3 NC unconnected No connect. Must be left floating.
4 VSS power_in Ground reference (0 V). All three VSS pins (4, 5, 8) should be tied to system ground; use a single-point ground technique to separate low-current small-signal ground from high-current supply ground.
5 VSS power_in Ground reference (0 V). Tie to system ground together with pins 4 and 8.
6 NC unconnected No connect. Must be left floating.
7 NC unconnected No connect. Must be left floating.
8 VSS power_in Ground reference (0 V). Tie to system ground together with pins 4 and 5.
9 BCp power_in Backup battery cell input. Accepts a 3-V primary (non-rechargeable) lithium cell; VBC range 2.0 V to 4.0 V (absolute max 4.5 V wrt VSS). Sources VOUT when VCC drops below the switch-over threshold VSO. Typical backup current 50 nA (150 nA max).
10 CECON1 output Conditioned chip-enable output 1 (active low). Drives CE of SRAM bank 1; forced inactive high during power-fail and for tCER after power-up. VOL 0.4 V at 2 mA, VOH 2.4 V at 0.5 mA.
11 CE input Chip-enable input (active low) from the host processor. Passed through to CECON1 or CECON2 (selected by A) with less than 25 ns propagation delay when power is valid; blocked otherwise for write-protection.
12 VCC power_in Main 3.3-V supply input (3.0 V to 3.6 V recommended, absolute max 6.0 V). Continuously monitored against VPFD (typ 2.9 V); power-fail below this threshold triggers write-protect and reset. Typical ICC 210 uA (500 uA max).
13 VOUT power_out Switched SRAM supply output. Sourced from VCC when power is valid (VCC-0.3 V at 80 mA) and from BCp during backup (VBC-0.3 V at 100 uA). Feeds the VCC pins of the external SRAM banks.
14 CECON2 output Conditioned chip-enable output 2 (active low). Drives CE of SRAM bank 2; forced inactive high during power-fail and for tCER after power-up. VOL 0.4 V at 2 mA, VOH 2.4 V at 0.5 mA.
15 BW output Battery warning output, open-drain, active low. Latches the result of the battery-warning comparison (threshold 0.677 x VCC) after tCER on power-up; low indicates low battery. Requires an external pull-up to VCC. VOL 0.4 V at 1 mA.
16 RST output Power-on/power-fail reset output to the system CPU, open-drain, active low. Held low while VCC < VPFD and for tRST (30-85 ms) after VCC returns above VPFD. External pull-up not to exceed 10 kohm when a push-button reset is used. VOL 0.4 V at 1 mA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Memory
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • BQ2205LYPWR

CAD (KiCad official)

  • Symbol: BQ2205LYPWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (17 pp, sha256 031dc3e4391ffd75, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF