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NCP45492XMNTWG

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onsemi Supervisor And Reset ICs, QFN-32-EP(4x4). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)ncp45492xmntwg
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Contents

README

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NCP45492XMNTWG

onsemi · Supervisor And Reset ICs · QFN-32-EP(4x4)

NCP45492XMNTWG from onsemi, in a QFN-32-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SH_IN_N1 input Channel 1 shunt resistor sense negative (high-voltage analog input, up to 26 V).
2 SH_IN_P1 input Channel 1 shunt resistor sense positive (high-voltage analog input, up to 26 V).
3 BS_IN1 input Channel 1 bus voltage sense, high-impedance input (0-26 V via external divider).
4 SH_IN_N2 input Channel 2 shunt resistor sense negative (high-voltage analog input, up to 26 V).
5 SH_IN_P2 input Channel 2 shunt resistor sense positive (high-voltage analog input, up to 26 V).
6 BS_IN2 input Channel 2 bus voltage sense, high-impedance input (0-26 V via external divider).
7 SH_O2 output Channel 2 shunt voltage gain-set / filter, current output (0-0.5 V op range, ISH_O_MAX = 5 mA).
8 NC unconnected No connect. Pin must be floated.
9 GND_FET output Low-side ground reference for external resistor dividers (open-drain FET switch; ~10 Ω ON, up to 26 V OFF).
10 SH_O3 output Channel 3 shunt voltage gain-set / filter, current output (0-0.5 V op range, ISH_O_MAX = 5 mA).
11 BS_IN3 input Channel 3 bus voltage sense, high-impedance input (0-26 V via external divider).
12 SH_IN_P3 input Channel 3 shunt resistor sense positive (high-voltage analog input, up to 26 V).
13 SH_IN_N3 input Channel 3 shunt resistor sense negative (high-voltage analog input, up to 26 V).
14 BS_IN4 input Channel 4 bus voltage sense, high-impedance input (0-26 V via external divider).
15 SH_IN_P4 input Channel 4 shunt resistor sense positive (high-voltage analog input, up to 26 V).
16 SH_IN_N4 input Channel 4 shunt resistor sense negative (high-voltage analog input, up to 26 V).
17 SH_O4 output Channel 4 shunt voltage gain-set / filter, current output (0-0.5 V op range, ISH_O_MAX = 5 mA).
18 NC unconnected No connect. Pin must be floated.
19 DIFF_OUT_N output Differential output, negative side. Drives external ADC; may be wire-OR'd with paired device (Hi-Z when not active). Full-scale output 800 mVpp; CLOAD up to 82 pF.
20 DIFF_OUT_P output Differential output, positive side. Drives external ADC; may be wire-OR'd with paired device (Hi-Z when not active). Full-scale output 800 mVpp.
21 NC unconnected No connect. Pin must be floated.
22 CM_REF_IN input Common-mode reference for differential output. Sets VCM (typ 565-885 mV) via external divider from BG_REF_OUT.
23 BG_REF_OUT output Buffered bandgap voltage output (VBG typ 1.3 V, 1.274-1.326 V; source up to 100 μA). Supplies BS_REF and CM_REF_IN via external dividers.
24 BS_REF input Bus OK reference input. Sets threshold for BS_INx valid detection; must be <0.2 V for BS_INx pins.
25 SKIP input Skip function control input. Modifies BS_OK logic per SKIP-logic table; can also force BS_OK low in absence of VCC.
26 MODE_SEL input Multi-level (LOW / Tri-state / HIGH) mode select input: LOW = Device A, floating = stand-alone, HIGH = Device B. Input impedance 100 kΩ (RFLOAT).
27 VCC power_in Device power supply, 2.8-3.8 V (abs max 5.5 V). IVCC_F ≤ 1.5 mA fully-functional, ≤400 μA limited, ≤180 μA standby.
28 ENABLE input Device enable. LOW = fully functional, floating = limited function, HIGH = standby low-power state. Input impedance 100 kΩ.
29 MUX_SEL input Multiplexer select digital input. Rising edges advance the readout channel sequence; period 0.185 μs to 11 μs in normal operation, ≥35 μs asserts reset.
30 BS_OK output Bus-OK indication (open-drain output). High-impedance when all monitored bus voltages are valid; low (RBS_OK ≤ 300 Ω) otherwise. Requires external pull-up.
31 NC unconnected No connect. Pin must be floated.
32 SH_O1 output Channel 1 shunt voltage gain-set / filter, current output (0-0.5 V op range, ISH_O_MAX = 5 mA).
33 GND power_in Device ground / exposed thermal pad. Must be connected to system ground (also serves as thermal path, RθJC = 5 °C/W).

Key specifications

Parameter Value
Manufacturer onsemi
Package QFN-32-EP(4x4)
Category Power Management (PMIC)
Pins 33

Ordering variants

Same part, different packaging or reel option.

  • NCP45492XMNTWG

CAD (KiCad official)

  • Symbol: NCP45492XMNTWG
  • Footprint: Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm
  • 3D model: QFN-32-EP(4x4) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (13 pp, sha256 a95726ed10ca911f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF