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STM32L431RCI6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-64. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L431RCI6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFBGA-64
STM32L431RCI6 from STMicroelectronics, in a UFBGA-64. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| A1 | PC14-OSC32_IN | bidirectional | FT I/O (5 V tolerant) supplied through the power switch with a 3 mA sink limit, so output use is limited to 2 MHz with 30 pF and it must not source current such as an LED; also the LSE oscillator input OSC32_IN. |
| A2 | PC13 | bidirectional | FT I/O (5 V tolerant) supplied through the power switch with a 3 mA sink limit, so output use is limited to 2 MHz with 30 pF and it must not source current such as an LED; also RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2. |
| A3 | PB9 | bidirectional | FT_f I/O (5 V tolerant, Fm+ capable) with alternate functions including IR_OUT, I2C1_SDA, SPI2_NSS, CAN1_TX, SDMMC1_D5 and SAI1_FS_A. |
| A4 | PB4 | bidirectional | FT_fa I/O (5 V tolerant, Fm+ capable, analog switch supplied by VDDA) that is configured as NJTRST with an internal pull-up after reset; alternate functions include I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS and TSC_G2_IO1. |
| A5 | PB3 | bidirectional | FT_a I/O (5 V tolerant, analog switch supplied by VDDA) that is configured as the JTDO-TRACESWO debug function after reset; alternate functions include TIM2_CH2, SPI1_SCK, SPI3_SCK and USART1_RTS_DE. |
| A6 | PA15 | bidirectional | FT I/O (5 V tolerant) that is configured as JTDI with an internal pull-up after reset; alternate functions include TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS and SPI3_NSS. |
| A7 | PA14 | bidirectional | FT I/O (5 V tolerant) that is configured as JTCK-SWCLK with an internal pull-down after reset; alternate functions include LPTIM1_OUT, I2C1_SMBA, SWPMI1_RX and SAI1_FS_B. |
| A8 | PA13 | bidirectional | FT I/O (5 V tolerant) that is configured as JTMS-SWDIO with an internal pull-up after reset; alternate functions include IR_OUT, SWPMI1_TX and SAI1_SD_B. |
| B1 | PC15-OSC32_OUT | bidirectional | FT I/O (5 V tolerant) supplied through the power switch with a 3 mA sink limit, so output use is limited to 2 MHz with 30 pF and it must not source current such as an LED; also the LSE oscillator output OSC32_OUT. |
| B2 | VBAT | power_in | Backup domain supply for the RTC and 32x32-bit backup registers, with an operating range of 1.55 V to 3.6 V. |
| B3 | PB8 | bidirectional | FT_f I/O (5 V tolerant, Fm+ capable) with alternate functions including I2C1_SCL, CAN1_RX, SDMMC1_D4, SAI1_MCLK_A and TIM16_CH1. |
| B4 | PH3/BOOT0 | bidirectional | FT I/O (5 V tolerant) that is also used as the BOOT0 boot-configuration pin, with EVENTOUT as an alternate function. |
| B5 | PD2 | bidirectional | FT I/O (5 V tolerant) with alternate functions including USART3_RTS_DE, TSC_SYNC, SDMMC1_CMD and EVENTOUT. |
| B6 | PC11 | bidirectional | FT I/O (5 V tolerant) with alternate functions including SPI3_MISO, USART3_RX, TSC_G3_IO3 and SDMMC1_D3. |
| B7 | PC10 | bidirectional | FT I/O (5 V tolerant) with alternate functions including SPI3_SCK, USART3_TX, TSC_G3_IO2 and SDMMC1_D2. |
| B8 | PA12 | bidirectional | FT I/O (5 V tolerant) with alternate functions including TIM1_ETR, SPI1_MOSI, USART1_RTS_DE and CAN1_TX. |
| C1 | PH0-OSC_IN | bidirectional | FT I/O (5 V tolerant) that is also the HSE oscillator input OSC_IN, with EVENTOUT as an alternate function. |
| C2 | VSS | power_in | Ground pin; all VSS pins must be connected to the external ground within the permitted range. |
| C3 | PB7 | bidirectional | FT_fa I/O (5 V tolerant, analog switch supplied by VDDA) with alternate functions including LPTIM1_IN2, I2C1_SDA, USART1_RX and TSC_G2_IO4; additional functions COMP2_INM and PVD_IN. |
| C4 | PB5 | bidirectional | FT I/O (5 V tolerant) with alternate functions including LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, TSC_G2_IO2, COMP2_OUT, SAI1_SD_B and TIM16_BKIN. |
| C5 | PC12 | bidirectional | FT I/O (5 V tolerant) with alternate functions including SPI3_MOSI, USART3_CK, TSC_G3_IO4 and SDMMC1_CK. |
| C6 | PA10 | bidirectional | FT_f I/O (5 V tolerant, Fm+ capable) with alternate functions including TIM1_CH3, I2C1_SDA, USART1_RX and SAI1_SD_A. |
| C7 | PA9 | bidirectional | FT_f I/O (5 V tolerant, Fm+ capable) with alternate functions including TIM1_CH2, I2C1_SCL, USART1_TX, SAI1_FS_A and TIM15_BKIN. |
| C8 | PA11 | bidirectional | FT I/O (5 V tolerant) with alternate functions including TIM1_CH4, TIM1_BKIN2, SPI1_MISO, COMP1_OUT, USART1_CTS and CAN1_RX. |
| D1 | PH1-OSC_OUT | bidirectional | FT I/O (5 V tolerant) that is also the HSE oscillator output OSC_OUT, with EVENTOUT as an alternate function. |
| D2 | VDD | power_in | Standard operating voltage supply, 1.71 V to 3.6 V; all VDD pins must be connected to the external power supply. |
| D3 | PB6 | bidirectional | FT_fa I/O (5 V tolerant, Fm+ capable, analog switch supplied by VDDA) with alternate functions including LPTIM1_ETR, I2C1_SCL, USART1_TX, TSC_G2_IO3 and SAI1_FS_B; additional function COMP2_INP. |
| D4 | VSS | power_in | Ground pin; all VSS pins must be connected to the external ground within the permitted range. |
| D5 | VSS | power_in | Ground pin; all VSS pins must be connected to the external ground within the permitted range. |
| D6 | VSS | power_in | Ground pin; all VSS pins must be connected to the external ground within the permitted range. |
| D7 | PA8 | bidirectional | FT I/O (5 V tolerant) with alternate functions including MCO, TIM1_CH1, USART1_CK, SWPMI1_IO, SAI1_SCK_A and LPTIM2_OUT. |
| D8 | PC9 | bidirectional | FT I/O (5 V tolerant) with alternate functions including TSC_G4_IO4, SDMMC1_D1 and EVENTOUT. |
| E1 | NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor. |
| E2 | PC1 | bidirectional | FT_fa I/O (5 V tolerant, Fm+ capable, analog switch supplied by VDDA) with alternate functions including LPTIM1_OUT, I2C3_SDA and LPUART1_TX; additional function ADC1_IN2. |
| E3 | PC0 | bidirectional | FT_fa I/O (5 V tolerant, Fm+ capable, analog switch supplied by VDDA) with alternate functions including LPTIM1_IN1, I2C3_SCL, LPUART1_RX and LPTIM2_IN1; additional function ADC1_IN1. |
| E4 | VDD | power_in | Standard operating voltage supply, 1.71 V to 3.6 V; all VDD pins must be connected to the external power supply. |
| E5 | VDD | power_in | Standard operating voltage supply, 1.71 V to 3.6 V; all VDD pins must be connected to the external power supply. |
| E6 | VDD | power_in | Standard operating voltage supply, 1.71 V to 3.6 V; all VDD pins must be connected to the external power supply. |
| E7 | PC7 | bidirectional | FT I/O (5 V tolerant) with alternate functions including TSC_G4_IO2, SDMMC1_D7 and EVENTOUT. |
| E8 | PC8 | bidirectional | FT I/O (5 V tolerant) with alternate functions including TSC_G4_IO3, SDMMC1_D0 and EVENTOUT. |
| F1 | VSSA/VREF- | power_in | Analog ground and negative ADC reference VREF-; VREF- can be internally connected to VSSA depending on the package. |
| F2 | PC2 | bidirectional | FT_a I/O (5 V tolerant, analog switch supplied by VDDA) with alternate functions including LPTIM1_IN2 and SPI2_MISO; additional function ADC1_IN3. |
| F3 | PA2 | bidirectional | FT_a I/O (5 V tolerant, analog switch supplied by VDDA) with alternate functions including TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS and COMP2_OUT; additional functions COMP2_INM, ADC1_IN7, WKUP4 and LSCO. |
| F4 | PA5 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternate functions including TIM2_CH1, TIM2_ETR, SPI1_SCK and LPTIM2_ETR; additional functions COMP1_INM, COMP2_INM, ADC1_IN10 and DAC1_OUT2. |
| F5 | PB0 | bidirectional | FT_a I/O (5 V tolerant, analog switch supplied by VDDA) with alternate functions including TIM1_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1, COMP1_OUT and SAI1_EXTCLK; additional function ADC1_IN15. |
| F6 | PC6 | bidirectional | FT I/O (5 V tolerant) with alternate functions including TSC_G4_IO1, SDMMC1_D6 and EVENTOUT. |
| F7 | PB15 | bidirectional | FT I/O (5 V tolerant) with alternate functions including RTC_REFIN, TIM1_CH3N, SPI2_MOSI, TSC_G1_IO4, SWPMI1_SUSPEND, SAI1_SD_A and TIM15_CH2. |
| F8 | PB14 | bidirectional | FT_f I/O (5 V tolerant, Fm+ capable) with alternate functions including TIM1_CH2N, I2C2_SDA, SPI2_MISO, USART3_RTS_DE, TSC_G1_IO3 and TIM15_CH1. |
| G1 | PC3 | bidirectional | FT_a I/O (5 V tolerant, analog switch supplied by VDDA) with alternate functions including LPTIM1_ETR, SPI2_MOSI, SAI1_SD_A and LPTIM2_ETR; additional function ADC1_IN4. |
| G2 | PA0 | bidirectional | FT_a I/O (5 V tolerant, analog switch supplied by VDDA) with alternate functions including TIM2_CH1, USART2_CTS, COMP1_OUT, SAI1_EXTCLK and TIM2_ETR; additional functions OPAMP1_VINP, COMP1_INM, ADC1_IN5, RTC_TAMP2 and WKUP1. |
| G3 | PA3 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternate functions including TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK, SAI1_MCLK_A and TIM15_CH2; additional functions OPAMP1_VOUT, COMP2_INP and ADC1_IN8. |
| G4 | PA6 | bidirectional | FT_a I/O (5 V tolerant, analog switch supplied by VDDA) with alternate functions including TIM1_BKIN, SPI1_MISO, COMP1_OUT, USART3_CTS, LPUART1_CTS, QUADSPI_BK1_IO3 and TIM16_CH1; additional function ADC1_IN11. |
| G5 | PB1 | bidirectional | FT_a I/O (5 V tolerant, analog switch supplied by VDDA) with alternate functions including TIM1_CH3N, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0 and LPTIM2_IN1; additional functions COMP1_INM and ADC1_IN16. |
| G6 | PB2 | bidirectional | FT_a I/O (5 V tolerant, analog switch supplied by VDDA) with alternate functions including RTC_OUT, LPTIM1_OUT and I2C3_SMBA; additional function COMP1_INP. |
| G7 | PB10 | bidirectional | FT_f I/O (5 V tolerant, Fm+ capable) with alternate functions including TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK, COMP1_OUT and SAI1_SCK_A. |
| G8 | PB13 | bidirectional | FT_f I/O (5 V tolerant, Fm+ capable) with alternate functions including TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, SWPMI1_TX, SAI1_SCK_A and TIM15_CH1N. |
| H1 | VDDA/VREF+ | power_in | Analog supply VDDA (1.62 V to 3.6 V when ADC or COMP is used) combined with the positive reference VREF+; VREF+ can be internally connected to VDDA depending on the package. |
| H2 | PA1 | bidirectional | FT_a I/O (5 V tolerant, analog switch supplied by VDDA) with alternate functions including TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE and TIM15_CH1N; additional functions OPAMP1_VINM, COMP1_INP and ADC1_IN6. |
| H3 | PA4 | bidirectional | TT_a I/O (3.6 V tolerant, analog switch supplied by VDDA) with alternate functions including SPI1_NSS, SPI3_NSS, USART2_CK, SAI1_FS_B and LPTIM2_OUT; additional functions COMP1_INM, COMP2_INM, ADC1_IN9 and DAC1_OUT1. |
| H4 | PA7 | bidirectional | FT_fa I/O (5 V tolerant, Fm+ capable, analog switch supplied by VDDA) with alternate functions including TIM1_CH1N, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2 and COMP2_OUT; additional function ADC1_IN12. |
| H5 | PC4 | bidirectional | FT_a I/O (5 V tolerant, analog switch supplied by VDDA) with alternate function USART3_TX; additional functions COMP1_INM and ADC1_IN13. |
| H6 | PC5 | bidirectional | FT_a I/O (5 V tolerant, analog switch supplied by VDDA) with alternate function USART3_RX; additional functions COMP1_INP, ADC1_IN14 and WKUP5. |
| H7 | PB11 | bidirectional | FT_f I/O (5 V tolerant, Fm+ capable) with alternate functions including TIM2_CH4, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS and COMP2_OUT. |
| H8 | PB12 | bidirectional | FT I/O (5 V tolerant) with alternate functions including TIM1_BKIN, TIM1_BKIN_COMP2, I2C2_SMBA, SPI2_NSS, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, SWPMI1_IO, SAI1_FS_A and TIM15_BKIN. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFBGA-64 |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32L431RCI6 - Footprint:
Package_BGA:UFBGA-64_5x5mm_Layout8x8_P0.5mm - 3D model: UFBGA-64 (KiCad packages3D, STEP)
- 3D model files:
stm32l431rci6-etched.step/stm32l431rci6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l431rci6.step/stm32l431rci6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (208 pp, sha256
71963de3cb899f8f, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).