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README

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ATMEGA32U4-AU

Microchip Tech · Microcontrollers (MCU/MPU/SOC) · QFP-44(10x10)

ATMEGA32U4-AU from Microchip Tech, in a QFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE6 bidirectional Port E bit 6 I/O with internal pull-up; alternate functions INT.6 and AIN0 (analog comparator positive input).
2 UVCC power_in USB pads internal regulator input supply voltage.
3 D- bidirectional USB full/low speed negative data line, connect to USB D- connector pin through a serial 22 Ohm resistor.
4 D+ bidirectional USB full/low speed positive data line, connect to USB D+ connector pin through a serial 22 Ohm resistor.
5 UGND power_in USB pads ground.
6 UCAP passive USB pads internal regulator output supply voltage, connect to an external 1 uF capacitor.
7 VBUS power_in USB VBUS monitor input.
8 PB0 bidirectional Port B bit 0 I/O with internal pull-up; alternate functions SS (SPI slave select) and PCINT0.
9 PB1 bidirectional Port B bit 1 I/O with internal pull-up; alternate functions SCK (SPI clock) and PCINT1.
10 PB2 bidirectional Port B bit 2 I/O with internal pull-up; alternate functions PDI, MOSI and PCINT2.
11 PB3 bidirectional Port B bit 3 I/O with internal pull-up; alternate functions PDO, MISO and PCINT3.
12 PB7 bidirectional Port B bit 7 I/O with internal pull-up; alternate functions PCINT7, OC0A, OC1C and RTS.
13 RESET input Reset input; a low level longer than the minimum pulse length generates a reset even if the clock is not running.
14 VCC power_in Digital supply voltage.
15 GND power_in Ground.
16 XTAL2 output Output from the inverting oscillator amplifier.
17 XTAL1 input Input to the inverting oscillator amplifier and to the internal clock operating circuit.
18 PD0 bidirectional Port D bit 0 I/O with internal pull-up; alternate functions OC0B, SCL (TWI clock) and INT0.
19 PD1 bidirectional Port D bit 1 I/O with internal pull-up; alternate functions SDA (TWI data) and INT1.
20 PD2 bidirectional Port D bit 2 I/O with internal pull-up; alternate functions RXD1 (USART1 receive) and INT2.
21 PD3 bidirectional Port D bit 3 I/O with internal pull-up; alternate functions TXD1 (USART1 transmit) and INT3.
22 PD5 bidirectional Port D bit 5 I/O with internal pull-up; alternate functions XCK1 (USART1 external clock) and CTS.
23 GND power_in Ground.
24 AVCC power_in Supply voltage for the A/D converter channels; connect to VCC if the ADC is not used, otherwise to VCC through a low-pass filter.
25 PD4 bidirectional Port D bit 4 I/O with internal pull-up; alternate functions ICP1 and ADC8.
26 PD6 bidirectional Port D bit 6 I/O with internal pull-up; alternate functions T1, OC4D (complementary) and ADC9.
27 PD7 bidirectional Port D bit 7 I/O with internal pull-up; alternate functions T0, OC4D and ADC10.
28 PB4 bidirectional Port B bit 4 I/O with internal pull-up; alternate functions PCINT4 and ADC11.
29 PB5 bidirectional Port B bit 5 I/O with internal pull-up; alternate functions PCINT5, OC1A, OC4B (complementary) and ADC12.
30 PB6 bidirectional Port B bit 6 I/O with internal pull-up; alternate functions PCINT6, OC1B, OC4B and ADC13.
31 PC6 bidirectional Port C bit 6 I/O with internal pull-up; alternate functions OC3A and OC4A (complementary).
32 PC7 bidirectional Port C bit 7 I/O with internal pull-up; alternate functions ICP3, CLKO and OC4A.
33 PE2 bidirectional Port E bit 2 I/O with internal pull-up; alternate function HWB.
34 VCC power_in Digital supply voltage.
35 GND power_in Ground.
36 PF7 bidirectional Port F bit 7 I/O or ADC7 analog input; JTAG TDI, with pull-up active even during reset when JTAG is enabled.
37 PF6 bidirectional Port F bit 6 I/O or ADC6 analog input; JTAG TDO.
38 PF5 bidirectional Port F bit 5 I/O or ADC5 analog input; JTAG TMS, with pull-up active even during reset when JTAG is enabled.
39 PF4 bidirectional Port F bit 4 I/O or ADC4 analog input; JTAG TCK, with pull-up active even during reset when JTAG is enabled.
40 PF1 bidirectional Port F bit 1 I/O or ADC1 analog input.
41 PF0 bidirectional Port F bit 0 I/O or ADC0 analog input.
42 AREF input Analog reference input for the A/D converter.
43 GND power_in Ground.
44 AVCC power_in Supply voltage for the A/D converter channels; connect to VCC if the ADC is not used, otherwise to VCC through a low-pass filter.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFP-44(10x10)
Category Embedded Processors & Controllers
Pins 44

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Low Voltage, except XTAL1 and RESET pins (LVTTL) VIL -0.5 V VCC = 2.7V - 5.5V 378
Input Low Voltage, XTAL1 pin VIL1 -0.5 V VCC = 2.7V - 5.5V 378
Input Low Voltage, RESET pin VIL2 -0.5 V VCC = 2.7V - 5.5V 378
Output Low Voltage VOL 0.7 V IOL = 10mA, VCC = 5V 378
Output Low Voltage VOL 0.5 V IOL = 5mA, VCC = 3V 378
Output High Voltage VOH 4.2 V IOH = -10mA, VCC = 5V 378
Output High Voltage VOH 2.3 V IOH = -5mA, VCC = 3V 378
Input Leakage Current I/O Pin (absolute value) IIL 1 µA VCC = 5.5V, pin low 378
Reset Pull-up Resistor RRST 30 60 kΩ 378
I/O Pin Pull-up Resistor RPU 20 50 kΩ 378
Power Supply Current, Active 4MHz ICC 5 mA VCC = 3V (ATmega16U4/ATmega32U4) 379
Power Supply Current, Active 8MHz ICC 10 15 mA VCC = 5V (ATmega16U4/ATmega32U4) 379
Power Supply Current, Idle 4MHz ICC 2 mA VCC = 3V (ATmega16U4/ATmega32U4) 379
Power Supply Current, Idle 8MHz ICC 6 mA VCC = 5V (ATmega16U4/ATmega32U4) 379
Power Supply Current, Power-down mode, WDT enabled ICC 12 µA VCC = 3V, Regulator Disabled 379
Power Supply Current, Power-down mode, WDT disabled ICC 1 5 µA VCC = 3V, Regulator Disabled 379
Analog Comparator Input Offset Voltage VACIO 40 mV VCC = 5V, Vin = VCC/2 379
Analog Comparator Input Leakage Current IACLK -50 50 nA VCC = 5V, Vin = VCC/2 379
Analog Comparator Propagation Delay tACID 750 ns VCC = 2.7V 379
Analog Comparator Propagation Delay tACID 500 ns VCC = 4.0V 379
Oscillator Frequency 1/tCLCL 0 8 MHz VCC = 2.7-5.5V (External Clock Drive) 380
Oscillator Frequency 1/tCLCL 0 16 MHz VCC = 4.5-5.5V (External Clock Drive) 380
USB Series resistor (external) tolerance Rusb -5 5 % 22Ω ±5% 380
UCAP external capacitor CUCAP 1 µF USB pads internal regulator output capacitor 380
UCAP external capacitor tolerance CUCAP -20 20 % 1µF ±20% 380
Brown-out Reset threshold VBOT (BODLEVEL 110) VBOT 1.8 2 2.2 V BODLEVEL[2..0] = 110 52
Brown-out Reset threshold VBOT (BODLEVEL 101) VBOT 2 2.2 2.4 V BODLEVEL[2..0] = 101 52
Brown-out Reset threshold VBOT (BODLEVEL 100) VBOT 2.2 2.4 2.6 V BODLEVEL[2..0] = 100 52
Brown-out Reset threshold VBOT (BODLEVEL 011) VBOT 2.4 2.6 2.8 V BODLEVEL[2..0] = 011 52
Brown-out Reset threshold VBOT (BODLEVEL 010) VBOT 3.2 3.4 3.6 V BODLEVEL[2..0] = 010 52
Brown-out Reset threshold VBOT (BODLEVEL 001) VBOT 3.3 3.5 3.7 V BODLEVEL[2..0] = 001 52
Brown-out Reset threshold VBOT (BODLEVEL 000) VBOT 4 4.3 4.5 V BODLEVEL[2..0] = 000 52
Voltage on RESET with respect to Ground -0.5 13 V 378
Voltage on any pin except RESET and VBUS with respect to Ground -0.5 V Upper limit printed as VCC+0.5V 378
Voltage on VBUS with respect to Ground -0.5 6 V 378
Maximum Operating Voltage 6 V 378
DC Current per I/O Pin 40 mA 378
DC Current VCC and GND Pins 200 mA 378
Storage Temperature -65 150 °C 378
Operating Temperature -40 85 °C 378
Supply Voltage VCC 2.7 5.5 V TA = -40°C to 85°C 378

CAD (KiCad official)

  • Symbol: ATMEGA32U4-AU
  • Footprint: Package_QFP:TQFP-44_10x10mm_P0.8mm
  • 3D model: QFP-44(10x10) (KiCad packages3D, STEP)
  • 3D model files: atmega32u4-au-etched.step / atmega32u4-au-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega32u4-au.step / atmega32u4-au.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (433 pp, sha256 f597eb86aaa7df12, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF