component
MC14051BDR2G
Public Made by Adomby adom
onsemi Analog Switches, Multiplexers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMC14051BDR2G
onsemi · Analog Switches, Multiplexers · SOIC-16
MC14051BDR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | X4 | passive | Channel 4 analog switch I/O, referenced to VEE, with recommended peak-to-peak swing from VEE to VDD. |
| 2 | X6 | passive | Channel 6 analog switch I/O, referenced to VEE, with recommended peak-to-peak swing from VEE to VDD. |
| 3 | X | passive | Common analog O/I for the MC14051B SP8T switch, referenced to VEE; analog levels must stay between VEE and VDD. |
| 4 | X7 | passive | Channel 7 analog switch I/O, referenced to VEE, with recommended peak-to-peak swing from VEE to VDD. |
| 5 | X5 | passive | Channel 5 analog switch I/O, referenced to VEE, with recommended peak-to-peak swing from VEE to VDD. |
| 6 | INH | input | Active-high inhibit control referenced to VSS; logic 1 turns all channels off (no channel selected), and it must be tied to a logic level when unused. |
| 7 | VEE | power_in | Most negative analog supply, must be less than or equal to VSS; analog switch I/O is referenced to VEE. |
| 8 | VSS | power_in | Digital control logic ground and reference for control inputs; must be greater than or equal to VEE. |
| 9 | C | input | Binary channel-select address bit (MSB) referenced to VSS; unused control inputs must be tied to VSS or VDD. |
| 10 | B | input | Binary channel-select address bit referenced to VSS; unused control inputs must be tied to VSS or VDD. |
| 11 | A | input | Binary channel-select address bit (LSB) referenced to VSS; unused control inputs must be tied to VSS or VDD. |
| 12 | X3 | passive | Channel 3 analog switch I/O, referenced to VEE, with recommended peak-to-peak swing from VEE to VDD. |
| 13 | X0 | passive | Channel 0 analog switch I/O, referenced to VEE, with recommended peak-to-peak swing from VEE to VDD. |
| 14 | X1 | passive | Channel 1 analog switch I/O, referenced to VEE, with recommended peak-to-peak swing from VEE to VDD. |
| 15 | X2 | passive | Channel 2 analog switch I/O, referenced to VEE, with recommended peak-to-peak swing from VEE to VDD. |
| 16 | VDD | power_in | Positive supply, 3.0 Vdc to 18 Vdc absolute maximum 18.0 V referenced to VEE; 15 V is the recommended maximum VDD-VEE difference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-16 |
| Category | Interface |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage Range (referenced to VEE) | VDD | -0.5 | 18 | V | Referenced to VEE, VSS ≥ VEE | 1 | |
| Input or Output Voltage Range (DC or Transient) | Vin, Vout | -0.5 | V | Referenced to VSS for control inputs and VEE for switch I/O | 1 | ||
| Input Current (DC or Transient) per Control Pin | Iin | 10 | mA | Per control pin | 1 | ||
| Switch Through Current | ISW | -25 | 25 | mA | 1 | ||
| Power Dissipation per Package | PD | 500 | mW | Note 1 | 1 | ||
| Ambient Temperature Range | TA | -55 | 125 | °C | 1 | ||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 1 | ||
| Lead Temperature | TL | 260 | °C | 8-second soldering | 1 | ||
| Power Dissipation Temperature Derating (D/DW packages) | -7 | mW/C | From 65C to 125C | 1 | |||
| Maximum Difference between VDD and VEE (recommended) | VDD − VEE | 15 | V | Recommended maximum; most parameters specified up to 15 V | 8 | ||
| Recommended Peak-to-Peak Voltage Into or Out of the Switch | VI/O | 0 | VPP | Channel On or Off | 3 | ||
| Recommended Static or Dynamic Voltage Across the Switch | Vswitch | 0 | 600 | mV | Channel On; TA = −55°C; Note 3 | 3 | |
| Recommended Static or Dynamic Voltage Across the Switch | Vswitch | 0 | 300 | mV | Channel On; TA = 125°C; Note 3 | 3 | |
| Power Supply Voltage Range | VDD − VEE | 3 | 18 | V | VSS ≥ VEE | 3 | |
| Quiescent Current Per Package | IDD | 5 | µA | VDD = 5.0 V; Control Inputs Vin = VSS or VDD; Switch I/O VEE ≤ VI/O ≤ VDD, Vswitch ≤ 500 mV (Note 3); TA = −55°C | 3 | ||
| Quiescent Current Per Package | IDD | 0.005 | 5 | µA | VDD = 5.0 V; Control Inputs Vin = VSS or VDD; Switch I/O VEE ≤ VI/O ≤ VDD, Vswitch ≤ 500 mV (Note 3); TA = 25°C | 3 | |
| Quiescent Current Per Package | IDD | 150 | µA | VDD = 5.0 V; Control Inputs Vin = VSS or VDD; Switch I/O VEE ≤ VI/O ≤ VDD, Vswitch ≤ 500 mV (Note 3); TA = 125°C | 3 | ||
| Quiescent Current Per Package | IDD | 10 | µA | VDD = 10 V; Control Inputs Vin = VSS or VDD; Switch I/O VEE ≤ VI/O ≤ VDD, Vswitch ≤ 500 mV (Note 3); TA = −55°C | 3 | ||
| Quiescent Current Per Package | IDD | 0.01 | 10 | µA | VDD = 10 V; Control Inputs Vin = VSS or VDD; Switch I/O VEE ≤ VI/O ≤ VDD, Vswitch ≤ 500 mV (Note 3); TA = 25°C | 3 | |
| Quiescent Current Per Package | IDD | 300 | µA | VDD = 10 V; Control Inputs Vin = VSS or VDD; Switch I/O VEE ≤ VI/O ≤ VDD, Vswitch ≤ 500 mV (Note 3); TA = 125°C | 3 | ||
| Quiescent Current Per Package | IDD | 20 | µA | VDD = 15 V; Control Inputs Vin = VSS or VDD; Switch I/O VEE ≤ VI/O ≤ VDD, Vswitch ≤ 500 mV (Note 3); TA = −55°C | 3 | ||
| Quiescent Current Per Package | IDD | 0.015 | 20 | µA | VDD = 15 V; Control Inputs Vin = VSS or VDD; Switch I/O VEE ≤ VI/O ≤ VDD, Vswitch ≤ 500 mV (Note 3); TA = 25°C | 3 | |
| Quiescent Current Per Package | IDD | 600 | µA | VDD = 15 V; Control Inputs Vin = VSS or VDD; Switch I/O VEE ≤ VI/O ≤ VDD, Vswitch ≤ 500 mV (Note 3); TA = 125°C | 3 | ||
| Low-Level Input Voltage | VIL | 1.5 | V | VDD = 5.0 V; Ron = per spec, Ioff = per spec; TA = −55°C | 3 | ||
| Low-Level Input Voltage | VIL | 2.25 | 1.5 | V | VDD = 5.0 V; Ron = per spec, Ioff = per spec; TA = 25°C | 3 | |
| Low-Level Input Voltage | VIL | 3 | V | VDD = 10 V; Ron = per spec, Ioff = per spec; TA = −55°C | 3 | ||
| Low-Level Input Voltage | VIL | 4.5 | 3 | V | VDD = 10 V; Ron = per spec, Ioff = per spec; TA = 25°C | 3 | |
| Low-Level Input Voltage | VIL | 4 | V | VDD = 15 V; Ron = per spec, Ioff = per spec; TA = −55°C | 3 | ||
| Low-Level Input Voltage | VIL | 6.75 | 4 | V | VDD = 15 V; Ron = per spec, Ioff = per spec; TA = 25°C | 3 | |
| High-Level Input Voltage | VIH | 3.5 | V | VDD = 5.0 V; Ron = per spec, Ioff = per spec; TA = −55°C | 3 | ||
| High-Level Input Voltage | VIH | 3.5 | 2.75 | V | VDD = 5.0 V; Ron = per spec, Ioff = per spec; TA = 25°C | 3 | |
| High-Level Input Voltage | VIH | 7 | V | VDD = 10 V; Ron = per spec, Ioff = per spec; TA = −55°C | 3 | ||
| High-Level Input Voltage | VIH | 7 | 5.5 | V | VDD = 10 V; Ron = per spec, Ioff = per spec; TA = 25°C | 3 | |
| High-Level Input Voltage | VIH | 11 | V | VDD = 15 V; Ron = per spec, Ioff = per spec; TA = −55°C | 3 | ||
| High-Level Input Voltage | VIH | 11 | 8.25 | V | VDD = 15 V; Ron = per spec, Ioff = per spec; TA = 25°C | 3 | |
| Input Leakage Current | Iin | -0.1 | 0.1 | µA | VDD = 15 V; Vin = 0 or VDD; TA = 25°C | 3 | |
| Input Leakage Current | Iin | 1 | µA | VDD = 15 V; Vin = 0 or VDD; TA = 125°C | 3 | ||
| ON Resistance | Ron | 800 | Ω | VDD = 5.0 V; Vswitch ≤ 500 mV (Note 3); Vin = VIL or VIH (Control), Vin = 0 to VDD (Switch); TA = −55°C | 3 | ||
| ON Resistance | Ron | 250 | 1050 | Ω | VDD = 5.0 V; Vswitch ≤ 500 mV (Note 3); Vin = VIL or VIH (Control), Vin = 0 to VDD (Switch); TA = 25°C | 3 | |
| ON Resistance | Ron | 1200 | Ω | VDD = 5.0 V; Vswitch ≤ 500 mV (Note 3); Vin = VIL or VIH (Control), Vin = 0 to VDD (Switch); TA = 125°C | 3 | ||
| ON Resistance | Ron | 400 | Ω | VDD = 10 V; Vswitch ≤ 500 mV (Note 3); Vin = VIL or VIH (Control), Vin = 0 to VDD (Switch); TA = −55°C | 3 | ||
| ON Resistance | Ron | 120 | 500 | Ω | VDD = 10 V; Vswitch ≤ 500 mV (Note 3); Vin = VIL or VIH (Control), Vin = 0 to VDD (Switch); TA = 25°C | 3 | |
| ON Resistance | Ron | 520 | Ω | VDD = 10 V; Vswitch ≤ 500 mV (Note 3); Vin = VIL or VIH (Control), Vin = 0 to VDD (Switch); TA = 125°C | 3 | ||
| ON Resistance | Ron | 220 | Ω | VDD = 15 V; Vswitch ≤ 500 mV (Note 3); Vin = VIL or VIH (Control), Vin = 0 to VDD (Switch); TA = −55°C | 3 | ||
| ON Resistance | Ron | 80 | 280 | Ω | VDD = 15 V; Vswitch ≤ 500 mV (Note 3); Vin = VIL or VIH (Control), Vin = 0 to VDD (Switch); TA = 25°C | 3 | |
| ON Resistance | Ron | 300 | Ω | VDD = 15 V; Vswitch ≤ 500 mV (Note 3); Vin = VIL or VIH (Control), Vin = 0 to VDD (Switch); TA = 125°C | 3 | ||
| Off-Channel Leakage Current | Ioff | -100 | 100 | nA | VDD = 15 V; Vin = VIL or VIH (Control), channel to channel or any one channel; TA = −55°C | 3 | |
| Off-Channel Leakage Current | Ioff | -1000 | 1000 | nA | VDD = 15 V; Vin = VIL or VIH (Control), channel to channel or any one channel; TA = 125°C | 3 | |
| Input Capacitance | Cin | 5 | 7.5 | pF | 3 | ||
| Propagation Delay, Switch Input to Switch Output (MC14051B) | tPLH, tPHL | 35 | 90 | ns | VDD − VEE = 5.0 V; CL = 50 pF, TA = 25°C; RL = 1 kΩ | 4 | |
| Propagation Delay, Switch Input to Switch Output (MC14051B) | tPLH, tPHL | 15 | 40 | ns | VDD − VEE = 10 V; CL = 50 pF, TA = 25°C; RL = 1 kΩ | 4 | |
| Propagation Delay, Switch Input to Switch Output (MC14051B) | tPLH, tPHL | 12 | 30 | ns | VDD − VEE = 15 V; CL = 50 pF, TA = 25°C; RL = 1 kΩ | 4 |
CAD (KiCad official)
- Symbol:
MC14051BDR2G - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
mc14051bdr2g-etched.step/mc14051bdr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc14051bdr2g.step/mc14051bdr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (13 pp, sha256
b5cb85e9b6743183, retrieved 2026-10-16, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).