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Contents

README

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SI4063-C2A-GMR

SILICON LABS · RF Transceiver ICs · QFN-20-EP(4x4)

SI4063-C2A-GMR from SILICON LABS, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SDN input Shutdown input, 0 to VDD V digital; SDN must be 0 in all modes except Shutdown, and SDN = 1 fully shuts the chip down and loses register contents.
2 NC unconnected Leave pin floating.
3 NC unconnected Leave pin floating.
4 TX output Transmit output on an open-drain PA connection, so the L-C match must supply VDD (+3.3 VDC nominal) to this pin.
5 NC unconnected Recommended to connect to GND per the reference design schematic; not connected internally to any circuitry.
6 VDD power_in Supply voltage input to internal regulators, +1.8 to +3.8 V, with a recommended supply of +3.3 V.
7 TXRAMP output Programmable bias output with ramp capability for an external FET PA.
8 VDD power_in Supply voltage input to internal regulators, +1.8 to +3.8 V, with a recommended supply of +3.3 V.
9 GPIO0 bidirectional General purpose digital I/O that can be configured through registers for functions such as microcontroller clock output, FIFO status, POR, wake-up timer, and low battery detect.
10 GPIO1 bidirectional General purpose digital I/O; the datasheet gives no pin-specific description for this pin.
11 nIRQ output General microcontroller interrupt status output that goes low when an interrupt event occurs; no external pull-up is required, though one may be desirable if multiple interrupt lines are connected.
12 SCLK input Serial clock input, 0 to VDD V digital, clocking data into the device on positive edge transitions of the 4-line serial bus.
13 SDO output Serial data readback output, 0 to VDD V digital, providing readback of the internal control registers.
14 SDI input Serial data input, 0 to VDD V digital, providing the serial data stream for the 4-line serial bus.
15 nSEL input Serial interface select input, 0 to VDD V digital, providing the select/enable function for the 4-line serial bus.
16 XOUT output Crystal oscillator output; connect to an external 25 to 32 MHz crystal, or leave floating when driving with an external source on XIN.
17 XIN input Crystal oscillator input; connect to an external 25 to 32 MHz crystal or to an external source.
18 GND power_in Ground; leave floating per the reference design when using an XTAL, or connect to TCXO GND (separate from the board reference ground plane) when using a TCXO.
19 GPIO2 bidirectional General purpose digital I/O that can be configured through registers for functions such as microcontroller clock output, FIFO status, POR, wake-up timer, and low battery detect.
20 GPIO3 bidirectional General purpose digital I/O that can be configured through registers for various functions.
21 PADDLE_GND passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer SILICON LABS
Package QFN-20-EP(4x4)
Category Radio Frequency Chip/Antenna
Pins 21

CAD (KiCad official)

  • Symbol: SI4063-C2A-GMR
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: si4063-c2a-gmr-etched.step / si4063-c2a-gmr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4063-c2a-gmr.step / si4063-c2a-gmr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SILICON LABS datasheet (37 pp, sha256 6c2f75f5b458d69f, retrieved 2026-10-28, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF