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STM32F051R4T6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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Contents

README

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STM32F051R4T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F051R4T6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup power supply pin for the RTC domain and backup registers.
2 PC13 bidirectional Standard 3.3 V TC I/O with RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2 functions; it is supplied through the power switch, which sinks at most 3 mA, so output speed must stay at or below 2 MHz with a 30 pF maximum load and the pin must not source LED current.
3 PC14-OSC32_IN bidirectional Standard 3.3 V TC I/O that is also the OSC32_IN low-speed oscillator input, with the same power-switch limits as PC13 (3 mA sink, 2 MHz at 30 pF, no current sourcing).
4 PC15-OSC32_OUT bidirectional Standard 3.3 V TC I/O that is also the OSC32_OUT low-speed oscillator output, with the same power-switch limits as PC13 (3 mA sink, 2 MHz at 30 pF, no current sourcing).
5 PF0-OSC_IN bidirectional 5 V-tolerant FT I/O whose alternate function is the OSC_IN high-speed oscillator input.
6 PF1-OSC_OUT bidirectional 5 V-tolerant FT I/O whose alternate function is the OSC_OUT high-speed oscillator output.
7 NRST bidirectional Active-low bidirectional device reset input and internal reset output with an embedded weak pull-up resistor.
8 PC0 bidirectional 3.3 V-tolerant TTa I/O directly connected to the ADC, with ADC_IN10 and EVENTOUT functions.
9 PC1 bidirectional 3.3 V-tolerant TTa I/O directly connected to the ADC, with ADC_IN11 and EVENTOUT functions.
10 PC2 bidirectional 3.3 V-tolerant TTa I/O directly connected to the ADC, with ADC_IN12 and EVENTOUT functions.
11 PC3 bidirectional 3.3 V-tolerant TTa I/O directly connected to the ADC, with ADC_IN13 and EVENTOUT functions.
12 VSSA power_in Analog ground pin; a distinct VSSA pin exists only on packages with 48 or more pins.
13 VDDA power_in Analog power supply, which may range from VDD up to 3.6 V, with a separate analog supply range of 2.4 to 3.6 V for the ADC.
14 PA0 bidirectional 3.3 V-tolerant TTa I/O with USART2_CTS, TIM2_CH1_ETR, COMP1_OUT and TSC_G1_IO1 alternate functions and ADC_IN0, COMP1_INM6, RTC_TAMP2 and WKUP1 additional functions.
15 PA1 bidirectional 3.3 V-tolerant TTa I/O with USART2_RTS, TIM2_CH2, TSC_G1_IO2 and EVENTOUT alternate functions and ADC_IN1 and COMP1_INP additional functions.
16 PA2 bidirectional 3.3 V-tolerant TTa I/O with USART2_TX, TIM2_CH3, TIM15_CH1, COMP2_OUT and TSC_G1_IO3 alternate functions and ADC_IN2 and COMP2_INM6 additional functions.
17 PA3 bidirectional 3.3 V-tolerant TTa I/O with USART2_RX, TIM2_CH4, TIM15_CH2 and TSC_G1_IO4 alternate functions and ADC_IN3 and COMP2_INP additional functions.
18 PF4 bidirectional 5 V-tolerant FT I/O with EVENTOUT alternate function.
19 PF5 bidirectional 5 V-tolerant FT I/O with EVENTOUT alternate function.
20 PA4 bidirectional 3.3 V-tolerant TTa I/O with SPI1_NSS, I2S1_WS, USART2_CK, TIM14_CH1 and TSC_G2_IO1 alternate functions and ADC_IN4, COMP1_INM4, COMP2_INM4 and DAC_OUT1 additional functions.
21 PA5 bidirectional 3.3 V-tolerant TTa I/O with SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR and TSC_G2_IO2 alternate functions and ADC_IN5, COMP1_INM5 and COMP2_INM5 additional functions.
22 PA6 bidirectional 3.3 V-tolerant TTa I/O with SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3 and EVENTOUT alternate functions and ADC_IN6 additional function.
23 PA7 bidirectional 3.3 V-tolerant TTa I/O with SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4 and EVENTOUT alternate functions and ADC_IN7 additional function.
24 PC4 bidirectional 3.3 V-tolerant TTa I/O with EVENTOUT alternate function and ADC_IN14 additional function.
25 PC5 bidirectional 3.3 V-tolerant TTa I/O with TSC_G3_IO1 alternate function and ADC_IN15 additional function.
26 PB0 bidirectional 3.3 V-tolerant TTa I/O with TIM3_CH3, TIM1_CH2N, TSC_G3_IO2 and EVENTOUT alternate functions and ADC_IN8 additional function.
27 PB1 bidirectional 3.3 V-tolerant TTa I/O with TIM3_CH4, TIM14_CH1, TIM1_CH3N and TSC_G3_IO3 alternate functions and ADC_IN9 additional function.
28 PB2 bidirectional 5 V-tolerant FT I/O with TSC_G3_IO4 alternate function.
29 PB10 bidirectional 5 V-tolerant FT I/O with I2C2_SCL, CEC, TIM2_CH3 and TSC_SYNC alternate functions.
30 PB11 bidirectional 5 V-tolerant FT I/O with I2C2_SDA, TIM2_CH4, TSC_G6_IO1 and EVENTOUT alternate functions.
31 VSS power_in Ground pin for the digital supply domain.
32 VDD power_in Digital power supply, specified from 2.0 V to 3.6 V.
33 PB12 bidirectional 5 V-tolerant FT I/O with SPI2_NSS, TIM1_BKIN, TSC_G6_IO2 and EVENTOUT alternate functions.
34 PB13 bidirectional 5 V-tolerant FT I/O with SPI2_SCK, TIM1_CH1N and TSC_G6_IO3 alternate functions.
35 PB14 bidirectional 5 V-tolerant FT I/O with SPI2_MISO, TIM15_CH1, TIM1_CH2N and TSC_G6_IO4 alternate functions.
36 PB15 bidirectional 5 V-tolerant FT I/O with SPI2_MOSI, TIM15_CH2, TIM1_CH3N and TIM15_CH1N alternate functions and RTC_REFIN additional function.
37 PC6 bidirectional 5 V-tolerant FT I/O with TIM3_CH1 alternate function.
38 PC7 bidirectional 5 V-tolerant FT I/O with TIM3_CH2 alternate function.
39 PC8 bidirectional 5 V-tolerant FT I/O with TIM3_CH3 alternate function.
40 PC9 bidirectional 5 V-tolerant FT I/O with TIM3_CH4 alternate function.
41 PA8 bidirectional 5 V-tolerant FT I/O with USART1_CK, TIM1_CH1, EVENTOUT and MCO alternate functions.
42 PA9 bidirectional 5 V-tolerant FT I/O with USART1_TX, TIM1_CH2, TIM15_BKIN and TSC_G4_IO1 alternate functions.
43 PA10 bidirectional 5 V-tolerant FT I/O with USART1_RX, TIM1_CH3, TIM17_BKIN and TSC_G4_IO2 alternate functions.
44 PA11 bidirectional 5 V-tolerant FT I/O with USART1_CTS, TIM1_CH4, COMP1_OUT, TSC_G4_IO3 and EVENTOUT alternate functions.
45 PA12 bidirectional 5 V-tolerant FT I/O with USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4 and EVENTOUT alternate functions.
46 PA13 (SWDIO) bidirectional 5 V-tolerant FT I/O that is configured as SWDIO after reset with an internal pull-up enabled, with IR_OUT as an alternate function.
47 PF6 bidirectional 5 V-tolerant FT I/O with I2C2_SCL alternate function.
48 PF7 bidirectional 5 V-tolerant FT I/O with I2C2_SDA alternate function.
49 PA14 (SWCLK) bidirectional 5 V-tolerant FT I/O that is configured as SWCLK after reset with an internal pull-down enabled, with USART2_TX as an alternate function.
50 PA15 bidirectional 5 V-tolerant FT I/O with SPI1_NSS, I2S1_WS, USART2_RX, TIM2_CH1_ETR and EVENTOUT alternate functions.
51 PC10 bidirectional 5 V-tolerant FT I/O with no alternate function listed in the pin definitions.
52 PC11 bidirectional 5 V-tolerant FT I/O with no alternate function listed in the pin definitions.
53 PC12 bidirectional 5 V-tolerant FT I/O with no alternate function listed in the pin definitions.
54 PD2 bidirectional 5 V-tolerant FT I/O with TIM3_ETR alternate function.
55 PB3 bidirectional 5 V-tolerant FT I/O with SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1 and EVENTOUT alternate functions.
56 PB4 bidirectional 5 V-tolerant FT I/O with SPI1_MISO, I2S1_MCK, TIM3_CH1, TSC_G5_IO2 and EVENTOUT alternate functions.
57 PB5 bidirectional 5 V-tolerant FT I/O with SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN and TIM3_CH2 alternate functions.
58 PB6 bidirectional 5 V-tolerant, Fast-mode-Plus capable FTf I/O with I2C1_SCL, USART1_TX, TIM16_CH1N and TSC_G5_IO3 alternate functions.
59 PB7 bidirectional 5 V-tolerant, Fast-mode-Plus capable FTf I/O with I2C1_SDA, USART1_RX, TIM17_CH1N and TSC_G5_IO4 alternate functions.
60 BOOT0 input Dedicated boot memory selection input (B pin type).
61 PB8 bidirectional 5 V-tolerant, Fast-mode-Plus capable FTf I/O with I2C1_SCL, CEC, TIM16_CH1 and TSC_SYNC alternate functions.
62 PB9 bidirectional 5 V-tolerant, Fast-mode-Plus capable FTf I/O with I2C1_SDA, IR_OUT, TIM17_CH1 and EVENTOUT alternate functions.
63 VSS power_in Ground pin for the digital supply domain.
64 VDD power_in Digital power supply, specified from 2.0 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32F051R4T6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32f051r4t6-etched.step / stm32f051r4t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f051r4t6.step / stm32f051r4t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (122 pp, sha256 80848a22804e56d8, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF