ISO6721FQDWVRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC1	power_in	Power supply for the input side, VCC1, referenced to GND1.
2	OUTA	output	Output, channel A.
3	INB	input	Input, channel B.
4	GND1	power_in	Ground connection for VCC1.
5	GND2	power_in	Ground connection for VCC2.
6	OUTB	output	Output, channel B.
7	INA	input	Input, channel A.
8	VCC2	power_in	Power supply for the output side, VCC2, referenced to GND2.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Signal Isolation Devices
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage side 1 (VCC=1.8V)	VCC1	1.71		1.89	V	VCC = 1.8V	6
Supply voltage side 1 (VCC=2.5V to 5V)	VCC1	2.25		5.5	V	VCC = 2.5V to 5V	6
Supply voltage side 2 (VCC=1.8V)	VCC2	1.71		1.89	V	VCC = 1.8V	6
Supply voltage side 2 (VCC=2.5V to 5V)	VCC2	2.25		5.5	V	VCC = 2.5V to 5V	6
UVLO threshold when supply voltage is rising	VCC(UVLO+)	1.53		1.71	V		6
UVLO threshold when supply voltage is falling	VCC(UVLO-)	1.1		1.41	V		6
Supply voltage UVLO hysteresis	Vhys(UVLO)	0.08		0.13	V		6
High level output current	IOH			-4	mA	VCCO = 5V	6
High level output current	IOH			-2	mA	VCCO = 3.3V	6
High level output current	IOH			-1	mA	VCCO = 2.5V	6
Low level output current	IOL			4	mA	VCCO = 5V	6
Low level output current	IOL			2	mA	VCCO = 3.3V	6
Low level output current	IOL			1	mA	VCCO = 2.5V	6
Data Rate	DR	0		50	Mbps		6
Ambient temperature	TA	-40	25	125	°C		6
Supply voltage VCC1 to GND1	VCC1	-0.5		6	V		5
Supply voltage VCC2 to GND2	VCC2	-0.5		6	V		5
Input voltage INx to GNDx		-0.5			V	upper limit VCCX + 0.5, see footnote 3	5
Output voltage OUTx to GNDx		-0.5			V	upper limit VCCX + 0.5, see footnote 3	5
Output current	Io	-15		15	mA		5
Operating junction temperature	TJ			150	°C		5
Storage temperature	Tstg	-65		150	°C		5
High-level output current VCC	VOL			0.4	V	IOL = 4mA; See Figure 6-1 (5 V supply)	13
High-level input current	IIH			10	µA	VIH = VCCI at INx	13
Low-level input current	IIL	-10			µA	VIL = 0V at INx	13
Common mode transient immunity (5 V)	CMTI	100	150		kV/µs	VI = VCC or 0V, VCM = 1200V	13
Low-level output voltage (3.3 V)	VOL			0.2	V	IOL = 2mA; See Figure 6-1	15
Common mode transient immunity (3.3 V)	CMTI	100	150		kV/µs	VI = VCC or 0V, VCM = 1200V	15
Low-level output voltage (2.5 V)	VOL			0.1	V	IOL = 1mA; See Figure 6-1	17
Common mode transient immunity (2.5 V)	CMTI	100	150		kV/µs	VI = VCC or 0 V, VCM = 1200 V	17
Low-level output voltage (1.8 V)	VOL			0.1	V	IOL = 1mA; See Figure 6-1	19
Common mode transient immunity (1.8 V)	CMTI	100	150		kV/µs	VI = VCC or 0V, VCM = 1200V	19
Supply current DC signal (ISO6721)	ICC1, ICC2		1.2	2.1	mA	VCC1 = VCC2 = 5 V ± 10%; VI = VCCI (ISO6721); VI = 0V (ISO6721 with F suffix)	13
Supply current DC signal (ISO6721 F suffix)	ICC1, ICC2		2.3	3.5	mA	VCC1 = VCC2 = 5 V ± 10%; VI = 0V (ISO6721); VI = VCCI (ISO6721 with F suffix)	13
Supply current AC signal 1Mbps	ICC1, ICC2		1.9	2.9	mA	VCC1 = VCC2 = 5 V ± 10%; all channels switching with square wave clock input; CL = 15pF; 1Mbps	13
Supply current AC signal 10Mbps	ICC1, ICC2		2.5	3.6	mA	VCC1 = VCC2 = 5 V ± 10%; all channels switching with square wave clock input; CL = 15pF; 10Mbps	13
Supply current AC signal 50Mbps	ICC1, ICC2		5.2	6.7	mA	VCC1 = VCC2 = 5 V ± 10%; all channels switching with square wave clock input; CL = 15pF; 50Mbps	13
Propagation delay time (5 V)	tPLH, tPHL		11	18	ns	VCC1 = VCC2 = 5 V ± 10%; See Figure 6-1	21
Propagation delay time (3.3 V)	tPLH, tPHL		11	18	ns	VCC1 = VCC2 = 3.3 V ± 10%; See Figure 6-1	21
Propagation delay time (2.5 V)	tPLH, tPHL		12	20.5	ns	VCC1 = VCC2 = 2.5 V ± 10%; See Figure 6-1	22
Propagation delay time (1.8 V)	tPLH, tPHL		15	24	ns	VCC1 = VCC2 = 1.8 V ± 5%; See Figure 6-1	22
Minimum pulse width	tUI	20			ns	See Figure 6-1	21
Channel-to-channel output skew time	tsk(o)			6	ns	Same direction channels	21
Time from UVLO to valid output data	tPU			300	µs		21
Maximum power dissipation (both sides), ISO6721	PD			73	mW	VCC1 = VCC2 = 5.5V, TJ = 150°C, CL = 15pF, input a 25MHz 50% duty cycle square wave	7
Junction-to-ambient thermal resistance (DWV)	RθJA		84.3		°C/W	DWV (SOIC) package	7
Junction-to-case (top) thermal resistance (DWV)	RθJC(top)		36.3		°C/W	DWV (SOIC) package	7
Junction-to-board thermal resistance (DWV)	RθJB		47		°C/W	DWV (SOIC) package	7
Junction-to-top characterization parameter (DWV)	ψJT		7.4		°C/W	DWV (SOIC) package	7
Junction-to-board characterization parameter (DWV)	ψJB		45.1		°C/W	DWV (SOIC) package	7
Input capacitance (5 V)	Ci		2.8		pF	VI = VCC/2 + 0.4×sin(2πft), f = 2MHz, VCC = 5V; See Figure 6-3	13
Barrier capacitance, input to output (DWV)	CIO		0.5		pF	VIO = 0.4 × sin(2πft), f = 1MHz	8

CAD (KiCad official)

Symbol: ISO6721FQDWVRQ1
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: iso6721fqdwvrq1-etched.step / iso6721fqdwvrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); iso6721fqdwvrq1.step / iso6721fqdwvrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (61 pp, sha256 bffa2110449af290, retrieved 2026-11-05, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

ISO6721FQDWVRQ1

Verified ISO6721FQDWVRQ1

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

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Datasheet

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