component
G2061
Public Made by Adomby adom
WXNSIC Gate Drivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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PCB Footprint
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Datasheet
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README
markdownG2061
WXNSIC · Gate Drivers · TSSOP-20
G2061 from WXNSIC, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HIN1 | input | First-phase high-side logic input, compatible with 3.3 V/5 V logic and with an internal 250 kΩ resistor to VSS; connecting it to COM is recommended when unused. |
| 2 | HIN2 | input | Second-phase high-side logic input, compatible with 3.3 V/5 V logic and with an internal 250 kΩ resistor to VSS; connecting it to COM is recommended when unused. |
| 3 | HIN3 | input | Third-phase high-side logic input, compatible with 3.3 V/5 V logic and with an internal 250 kΩ resistor to VSS; connecting it to COM is recommended when unused. |
| 4 | LIN1 | input | First-phase low-side logic input, compatible with 3.3 V/5 V logic and with an internal 250 kΩ resistor to VSS; connecting it to COM is recommended when unused. |
| 5 | LIN2 | input | Second-phase low-side logic input, compatible with 3.3 V/5 V logic and with an internal 250 kΩ resistor to VSS; connecting it to COM is recommended when unused. |
| 6 | LIN3 | input | Third-phase low-side logic input, compatible with 3.3 V/5 V logic and with an internal 250 kΩ resistor to VSS; connecting it to COM is recommended when unused. |
| 7 | VCC | power_in | Low-side supply voltage, recommended 8 V to 20 V (absolute maximum 25 V); low-side outputs are disabled below the VCC UVLO threshold (about 7.0 V rising, 6.6 V falling). |
| 8 | COM | power_in | Ground reference for the logic inputs, VCC and the low-side outputs, to which the thermal pad should also be connected. |
| 9 | LO3 | output | Third-phase low-side gate drive output referenced to COM, driving a power MOSFET/IGBT with a push-pull stage (source/sink 1.5 A/1.8 A typical peak). |
| 10 | LO2 | output | Second-phase low-side gate drive output referenced to COM, driving a power MOSFET/IGBT with a push-pull stage (source/sink 1.5 A/1.8 A typical peak). |
| 11 | LO1 | output | First-phase low-side gate drive output referenced to COM, driving a power MOSFET/IGBT with a push-pull stage (source/sink 1.5 A/1.8 A typical peak). |
| 12 | VS3 | power_in | Third-phase high-side floating ground (switch node), which withstands a transient of -9 V for 50 ns and dVS/dt up to ±50 V/ns, with a rated range of -9 V to 250 V. |
| 13 | HO3 | output | Third-phase high-side gate drive output referenced to VS, which is enabled only while VB-VS is above its UVLO threshold (about 7.1 V rising, 6.9 V falling). |
| 14 | VB3 | power_in | Third-phase high-side floating supply, which must be kept between VS+8 V and VS+20 V with a bootstrap circuit. |
| 15 | VS2 | power_in | Second-phase high-side floating ground (switch node), which withstands a transient of -9 V for 50 ns and dVS/dt up to ±50 V/ns, with a rated range of -9 V to 250 V. |
| 16 | HO2 | output | Second-phase high-side gate drive output referenced to VS, which is enabled only while VB-VS is above its UVLO threshold (about 7.1 V rising, 6.9 V falling). |
| 17 | VB2 | power_in | Second-phase high-side floating supply, which must be kept between VS+8 V and VS+20 V with a bootstrap circuit. |
| 18 | VS1 | power_in | First-phase high-side floating ground (switch node), which withstands a transient of -9 V for 50 ns and dVS/dt up to ±50 V/ns, with a rated range of -9 V to 250 V. |
| 19 | HO1 | output | First-phase high-side gate drive output referenced to VS, which is enabled only while VB-VS is above its UVLO threshold (about 7.1 V rising, 6.9 V falling). |
| 20 | VB1 | power_in | First-phase high-side floating supply, which must be kept between VS+8 V and VS+20 V with a bootstrap circuit. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WXNSIC |
| Package | TSSOP-20 |
| Category | Motor Driver ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-side floating ground voltage (recommended) | VS1,2,3 | -9 | 250 | V | 5 | ||
| VS negative bias | VS | -9 | V | 6 | |||
| High-side floating supply voltage (recommended) | VB1,2,3 | 8 | 20 | V | Referenced to VS: VS+8 to VS+20 | 5 | |
| Low-side supply voltage (recommended) | VCC | 8 | 20 | V | 5 | ||
| Ambient temperature (recommended) | TA | -40 | 125 | °C | 5 | ||
| High-side floating supply voltage (absolute maximum) | VB1,2,3 | -0.3 | 275 | V | Referenced to COM | 5 | |
| Low-side supply voltage (absolute maximum) | VCC | -0.3 | 25 | V | Referenced to COM | 5 | |
| Allowed transient VS slew rate (absolute maximum) | dVS/dt | 50 | V/ns | 5 | |||
| Package power dissipation | PD | 1.25 | W | TA ≤25°C | 5 | ||
| ESD human body model | ESD | 1.5 | kV | Human body discharge mode | 5 | ||
| ESD machine model | ESD | 500 | V | Machine discharge mode | 5 | ||
| Thermal resistance junction to ambient | RthJA | 100 | °C/W | 5 | |||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature | TS | -55 | 150 | °C | 5 | ||
| Lead temperature | TL | 300 | °C | 5 | |||
| Turn-on propagation delay | tON | 150 | 250 | ns | VS=0V | 6 | |
| Turn-off propagation delay | tOFF | 120 | 250 | ns | VS=250V | 6 | |
| Rise time | tR | 30 | ns | 6 | |||
| Fall time | tF | 30 | ns | 6 | |||
| Dead time | DT | 100 | 200 | 300 | ns | 6 | |
| Delay matching (tON, tOFF) | MT | 50 | ns | 6 | |||
| VCC undervoltage positive-going threshold | VCCUV+ | 6.4 | 7 | 7.6 | V | 6 | |
| VCC undervoltage negative-going threshold | VCCUV- | 6 | 6.6 | 7.2 | V | 6 | |
| VCC undervoltage hysteresis | VCCUVHYS | 0.4 | V | 6 | |||
| VBS undervoltage positive-going threshold | VBSUV+ | 6.4 | 7.1 | 7.7 | V | 6 | |
| VBS undervoltage negative-going threshold | VBSUV- | 6.2 | 6.9 | 7.5 | V | 6 | |
| VBS undervoltage hysteresis | VBSUVHYS | 0.2 | V | 6 | |||
| Offset supply leakage current | ILK | 90 | µA | VB=VS=250V | 6 | ||
| VBS quiescent current | IQBS | 70 | 150 | µA | VIN=0V or 5V | 6 | |
| VCC quiescent current | IQCC | 230 | 350 | µA | VIN=0V or 5V | 6 | |
| Logic high input threshold | VIH | 2.5 | V | VCC=10V to 20V | 6 | ||
| Logic low input threshold | VIL | 0.8 | V | VCC=10V to 20V | 6 | ||
| High-level output voltage drop | VOH | 0.2 | V | IO=0A | 6 | ||
| Low-level output voltage drop | VOL | 0.1 | V | IO=0A | 6 | ||
| Logic '1' input bias current | IIN+ | 25 | 50 | µA | HIN=5V, LIN=5V | 6 | |
| Logic '0' input bias current | IIN- | 2 | µA | HIN=0V, LIN=0V | 6 | ||
| Output high short-circuit pulsed current | IO+ | 1.1 | 1.5 | A | VO=0V, PW≤10us | 6 | |
| Output low short-circuit pulsed current | IO- | 1.3 | 1.8 | A | VO=15V, PW≤10us | 6 |
CAD (KiCad official)
- Symbol:
G2061 - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
g2061-etched.step/g2061-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);g2061.step/g2061.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WXNSIC datasheet (14 pp, sha256
299aff9114ee55e1, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).