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M74HC4094YTTR
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STMicroelectronics Shift Registers, TSSOP-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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Datasheet
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README
markdownM74HC4094YTTR
STMicroelectronics · Shift Registers · TSSOP-16
M74HC4094YTTR from STMicroelectronics, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | STROBE | input | Strobe input: data latches on the negative going transition of STROBE, and when held high data propagates through the latch to the 3-state output buffer. |
| 2 | SERIAL IN | input | Serial data input to the 8-bit shift register, shifted in on the positive going transition of the clock. |
| 3 | CLOCK | input | Clock input: data shifts through the shift register on its positive going transition. |
| 4 | Q1 to Q7 | tri_state | Parallel 3-state output, enabled when OUTPUT ENABLE is taken high and high impedance when OE is low. |
| 5 | Q1 to Q7 | tri_state | Parallel 3-state output, enabled when OUTPUT ENABLE is taken high and high impedance when OE is low. |
| 6 | Q1 to Q7 | tri_state | Parallel 3-state output, enabled when OUTPUT ENABLE is taken high and high impedance when OE is low. |
| 7 | Q1 to Q7 | tri_state | Parallel 3-state output, enabled when OUTPUT ENABLE is taken high and high impedance when OE is low. |
| 8 | GND | power_in | Ground (0 V) reference for the device. |
| 9 | QS | output | Serial output of the last shift register stage, used to cascade several devices. |
| 10 | QS' | output | Second serial output, carrying the QS data transferred on the following negative transition of the clock. |
| 11 | Q1 to Q7 | tri_state | Parallel 3-state output, enabled when OUTPUT ENABLE is taken high and high impedance when OE is low. |
| 12 | Q1 to Q7 | tri_state | Parallel 3-state output, enabled when OUTPUT ENABLE is taken high and high impedance when OE is low. |
| 13 | Q1 to Q7 | tri_state | Parallel 3-state output, enabled when OUTPUT ENABLE is taken high and high impedance when OE is low. |
| 14 | Q1 to Q7 | tri_state | Parallel 3-state output, enabled when OUTPUT ENABLE is taken high and high impedance when OE is low. |
| 15 | OE | input | Output enable input: the parallel 3-state outputs are enabled when this input is taken high. |
| 16 | VCC | power_in | Positive supply voltage; recommended operating range is 2 V to 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 6 | ||
| DC input voltage | VI | -0.5 | V | max printed as VCC + 0.5 V | 6 | ||
| DC output voltage | VO | -0.5 | V | max printed as VCC + 0.5 V | 6 | ||
| DC input diode current | IIK | -20 | 20 | mA | 6 | ||
| DC output diode current | IOK | -20 | 20 | mA | 6 | ||
| DC output current | IO | -25 | 25 | mA | 6 | ||
| DC VCC or ground current | ICC or IGND | -50 | 50 | mA | 6 | ||
| Power dissipation | PD | 500 | mW | 500 mW at 65 °C; derate to 300 mW by 10 mW/°C from 65 °C to 85 °C | 6 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 6 | ||
| Lead temperature | TL | 300 | °C | 10 sec | 6 | ||
| Supply voltage | VCC | 2 | 6 | V | 6 | ||
| Input voltage | VI | 0 | V | max = VCC | 6 | ||
| Output voltage | VO | 0 | V | max = VCC | 6 | ||
| Operating temperature | Top | -55 | 125 | °C | 6 | ||
| Input rise and fall time | tr, tf | 0 | 1000 | ns | VCC = 2.0 V | 6 | |
| Input rise and fall time | tr, tf | 0 | 500 | ns | VCC = 4.5 V | 6 | |
| Input rise and fall time | tr, tf | 0 | 400 | ns | VCC = 6.0 V | 6 | |
| High level input voltage | VIH | 1.5 | V | VCC = 2.0 V; -55 to 125 °C | 7 | ||
| High level input voltage | VIH | 3.15 | V | VCC = 4.5 V; -55 to 125 °C | 7 | ||
| High level input voltage | VIH | 4.2 | V | VCC = 6.0 V; -55 to 125 °C | 7 | ||
| Low level input voltage | VIL | 0.5 | V | VCC = 2.0 V; -55 to 125 °C | 7 | ||
| Low level input voltage | VIL | 1.35 | V | VCC = 4.5 V; -55 to 125 °C | 7 | ||
| Low level input voltage | VIL | 1.8 | V | VCC = 6.0 V; -55 to 125 °C | 7 | ||
| High level output voltage | VOH | 1.9 | V | VCC = 2.0 V; IO = -20 μA; -55 to 125 °C | 7 | ||
| High level output voltage | VOH | 4.4 | V | VCC = 4.5 V; IO = -20 μA; -55 to 125 °C | 7 | ||
| High level output voltage | VOH | 5.9 | V | VCC = 6.0 V; IO = -20 μA; -55 to 125 °C | 7 | ||
| High level output voltage | VOH | 4.1 | V | VCC = 4.5 V; IO = -4.0 mA; -55 to 125 °C | 7 | ||
| High level output voltage | VOH | 5.6 | V | VCC = 6.0 V; IO = -5.2 mA; -55 to 125 °C | 7 | ||
| Low level output voltage | VOL | 0.1 | V | VCC = 2.0 V; IO = 20 μA; -55 to 125 °C | 7 | ||
| Low level output voltage | VOL | 0.4 | V | VCC = 4.5 V; IO = 4.0 mA; -55 to 125 °C | 7 | ||
| Input leakage current | II | -1 | 1 | μA | VCC = 6.0 V; VI = VCC or GND; -55 to 125 °C | 7 | |
| High impedance output leakage current | IOZ | -10 | 10 | μA | VCC = 6.0 V; VI = VIH or VIL; VO = VCC or GND; -55 to 125 °C | 7 | |
| Quiescent supply current | ICC | 80 | μA | VCC = 6.0 V; VI = VCC or GND; -55 to 125 °C | 7 | ||
| Propagation delay time (CLOCK - Qn) | tPLH, tPHL | 300 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 2.0 V; -55 to 125 °C | 8 | ||
| Propagation delay time (CLOCK - Qn) | tPLH, tPHL | 60 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 4.5 V; -55 to 125 °C | 8 | ||
| Propagation delay time (CLOCK - Qn) | tPLH, tPHL | 51 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 6.0 V; -55 to 125 °C | 8 | ||
| Propagation delay time (STROBE - Qn) | tPLH, tPHL | 240 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 2.0 V; -55 to 125 °C | 8 | ||
| Propagation delay time (STROBE - Qn) | tPLH, tPHL | 48 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 4.5 V; -55 to 125 °C | 8 | ||
| Propagation delay time (STROBE - Qn) | tPLH, tPHL | 41 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 6.0 V; -55 to 125 °C | 8 | ||
| High impedance output enable time | tPZL, tPZH | 225 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 2.0 V; -55 to 125 °C | 8 | ||
| High impedance output enable time | tPZL, tPZH | 45 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 4.5 V; -55 to 125 °C | 8 | ||
| High impedance output enable time | tPZL, tPZH | 38 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 6.0 V; -55 to 125 °C | 8 | ||
| High impedance output disable time | tPHZ, tPLZ | 225 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 2.0 V; -55 to 125 °C | 8 | ||
| High impedance output disable time | tPHZ, tPLZ | 45 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 4.5 V; -55 to 125 °C | 8 | ||
| High impedance output disable time | tPHZ, tPLZ | 38 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 6.0 V; -55 to 125 °C | 8 | ||
| Maximum clock frequency | fMAX | 4 | MHz | CL = 50 pF, tr = tf = 6 ns; VCC = 2.0 V; -55 to 125 °C | 8 | ||
| Maximum clock frequency | fMAX | 20 | MHz | CL = 50 pF, tr = tf = 6 ns; VCC = 4.5 V; -55 to 125 °C | 8 | ||
| Maximum clock frequency | fMAX | 24 | MHz | CL = 50 pF, tr = tf = 6 ns; VCC = 6.0 V; -55 to 125 °C | 8 | ||
| Minimum pulse width | tW(H), tW(L) | 110 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 2.0 V; -55 to 125 °C | 8 | ||
| Minimum pulse width | tW(H), tW(L) | 22 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 4.5 V; -55 to 125 °C | 8 | ||
| Minimum pulse width | tW(H), tW(L) | 19 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 6.0 V; -55 to 125 °C | 8 | ||
| Minimum set-up time (SERIAL INPUT) | ts | 110 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 2.0 V; -55 to 125 °C | 8 | ||
| Minimum set-up time (SERIAL INPUT) | ts | 22 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 4.5 V; -55 to 125 °C | 8 | ||
| Minimum set-up time (SERIAL INPUT) | ts | 19 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 6.0 V; -55 to 125 °C | 8 | ||
| Minimum set-up time (STROBE) | ts | 145 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 2.0 V; -55 to 125 °C | 9 | ||
| Minimum set-up time (STROBE) | ts | 29 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 4.5 V; -55 to 125 °C | 9 | ||
| Minimum set-up time (STROBE) | ts | 25 | ns | CL = 50 pF, tr = tf = 6 ns; VCC = 6.0 V; -55 to 125 °C | 9 |
CAD (KiCad official)
- Symbol:
M74HC4094YTTR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
m74hc4094yttr-etched.step/m74hc4094yttr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m74hc4094yttr.step/m74hc4094yttr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (17 pp, sha256
ff1ebdc1e4c4a07b, retrieved 2026-10-22, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).