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DGD2184MS8-13
Public Made by Adomby adom
Diodes Incorporated Pre-ordered Chips, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDGD2184MS8-13
Diodes Incorporated · Pre-ordered Chips · SO-8
DGD2184MS8-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Logic input for the high-side and low-side gate driver outputs (HO and LO), in phase with HO, with 3.3V-capable Schmitt trigger and internal pull-down (VIH min 2.5V, VIL max 0.8V). |
| 2 | SD* | input | Active-low shutdown logic input (enabled low), with VSDTH+ min 2.5V and VSDTH- max 0.8V. |
| 3 | COM | power_in | Low-side and logic return (ground reference). |
| 4 | LO | output | Low-side gate drive output, 1.9A source / 2.3A sink typical, swings 0V to VCC. |
| 5 | VCC | power_in | Low-side and logic fixed supply, recommended 10V to 20V (absolute maximum 24V). |
| 6 | VS | power_in | High-side floating supply return, offset up to 600V recommended operating. |
| 7 | HO | output | High-side gate drive output, 1.9A source / 2.3A sink typical, swings VS to VB. |
| 8 | VB | power_in | High-side floating supply, VS+10V to VS+20V recommended (absolute maximum 624V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic 1 Input Voltage | VIH | 2.5 | V | VCC = 10V to 20V | 4 | ||
| Logic 0 Input Voltage | VIL | 0.8 | V | VCC = 10V to 20V | 4 | ||
| SD* Input Positive Going Threshold | VSDTH+ | 2.5 | V | VCC = 10V to 20V | 4 | ||
| SD* Input Negative Going Threshold | VSDTH- | 0.8 | V | VCC = 10V to 20V | 4 | ||
| High Level Output Voltage, VBIAS, VO | VOH | 1.2 | V | IO = 0mA | 4 | ||
| Low Level Output Voltage, VO | VOL | 0.1 | V | IO = 20mA | 4 | ||
| Offset Supply Leakage Current | ILK | 50 | µA | VB = VS = 600V | 4 | ||
| Quiescent VBS Supply Current | IBSQ | 20 | 60 | 150 | µA | VIN = 0V or 5V | 4 |
| Quiescent VCC Supply Current | ICCQ | 0.4 | 1 | 1.8 | mA | VIN = 0V or 5V | 4 |
| Logic 1 Input Bias Current | IIN+ | 25 | 60 | µA | IN = 5V, SD* = 0V | 4 | |
| Logic 0 Input Bias Current | IIN- | 1 | µA | IN = 0V, SD* = 5V | 4 | ||
| VBS Supply Under-Voltage Positive Going Threshold | VBSUV+ | 8 | 8.9 | 9.8 | V | 4 | |
| VBS Supply Under-Voltage Negative Going Threshold | VBSUV- | 7.4 | 8.2 | 9 | V | 4 | |
| VCC Supply Under-Voltage Positive Going Threshold | VCCUV+ | 8 | 8.9 | 9.8 | V | 4 | |
| VCC Supply Under-Voltage Negative Going Threshold | VCCUV- | 7.4 | 8.2 | 9 | V | 4 | |
| Output High Short Circuit Pulsed Current | IO+ | 1.4 | 1.9 | A | VO = 0V, PW ≤ 10µs | 4 | |
| Output Low Short Circuit Pulsed Current | IO- | 1.7 | 2.3 | A | VO = 15V, PW ≤ 10µs | 4 | |
| Turn-On Propagation Delay | ton | 585 | 900 | ns | VS = 0V | 4 | |
| Turn-Off Propagation Delay | toff | 170 | 400 | ns | VS = 0V or 600V | 4 | |
| Shut-Down Propagation Delay | tSD | 180 | 270 | ns | 4 | ||
| Delay Matching, HO & LO Turn-On | tDMON | 90 | ns | 4 | |||
| Delay Matching, HO & LO Turn-Off | tDMOFF | 40 | ns | IO = 0A | 4 | ||
| Turn-On Rise Time | tr | 40 | 60 | ns | VS = 0V | 4 | |
| Turn-Off Fall Time | tf | 20 | 35 | ns | VS = 0V | 4 | |
| Deadtime | tDT | 345 | 395 | 445 | ns | 4 | |
| High-Side Floating Supply Voltage | VB | -0.3 | 624 | V | TA = +25°C | 3 | |
| Offset Supply Voltage Transient | dVS/dt | 50 | V/ns | TA = +25°C | 3 | ||
| Low-Side Fixed Supply Voltage | VCC | -0.3 | 24 | V | TA = +25°C | 3 | |
| Power Dissipation | PD | 0.625 | W | TA = +25°C, JEDEC 2-layer FR-4 board | 3 | ||
| Operating Temperature (junction) | TJ | 150 | °C | TA = +25°C | 3 | ||
| Lead Temperature (Soldering, 10s) | TL | 300 | °C | TA = +25°C | 3 | ||
| Storage Temperature Range | TSTG | -55 | 150 | °C | TA = +25°C | 3 | |
| Thermal Resistance, Junction to Ambient | RθJA | 200 | °C/W | JEDEC 2-layer FR-4 board | 3 | ||
| High-Side Floating Supply Offset Voltage | VS | 600 | V | Logic operation for VS of -5V to +600V | 3 | ||
| Low-Side Fixed Supply Voltage | VCC | 10 | 20 | V | 3 | ||
| Low-Side Output Voltage | VLO | 0 | V | 3 | |||
| Logic Input Voltage (IN and SD*) | VIN | 0 | V | 3 | |||
| Ambient Temperature | TA | -40 | 125 | °C | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MILSTD-202, Method 208 Weight: 0.075 grams (Approximate) | 1 |
CAD (KiCad official)
- Symbol:
DGD2184MS8-13 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
dgd2184ms8-13-etched.step/dgd2184ms8-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dgd2184ms8-13.step/dgd2184ms8-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (12 pp, sha256
1d7716278aadbdf3, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).