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RS1G74XVS8
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Jiangsu RUNIC Tech Logic Gates, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownRS1G74XVS8
Jiangsu RUNIC Tech · Logic Gates · VSSOP-8
RS1G74XVS8 from Jiangsu RUNIC Tech, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLK | input | Clock input; the D input is transferred to the outputs on the positive-going edge of this clock when PRE̅ and CLR̅ are inactive (high), and inputs accept up to 5.5 V. |
| 2 | D | input | Data input that is transferred to Q on the positive clock edge when PRE̅ and CLR̅ are high and setup/hold times are met; inputs accept up to 5.5 V. |
| 3 | Q̅ | output | Inverted output; High-Level Output Current is -24 mA at VCC=3.0 V and Low-Level Output Current is 24 mA at VCC=3.0 V, with ±50 mA maximum continuous output current. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | Q | output | Output; High-Level Output Current is -24 mA at VCC=3.0 V and Low-Level Output Current is 24 mA at VCC=3.0 V, with ±50 mA maximum continuous output current. |
| 6 | CLR̅ | input | Active-low clear input; pulling it low sets Q low regardless of the other inputs, and inputs accept up to 5.5 V. |
| 7 | PRE̅ | input | Active-low preset input; pulling it low sets Q high regardless of the other inputs, and inputs accept up to 5.5 V. |
| 8 | VCC | power_in | Supply voltage; the recommended operating range is 1.65 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Jiangsu RUNIC Tech |
| Package | VSSOP-8 |
| Category | Logic |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 1.65 | 5.5 | V | Operating | 7 | |
| High-Level Input Voltage | VIH | 1.7 | V | VCC=2.3V to 2.7V | 7 | ||
| High-Level Input Voltage | VIH | 2 | V | VCC=3V to 3.6V | 7 | ||
| Low-Level Input Voltage | VIL | 0.7 | V | VCC=2.3V to 2.7V | 7 | ||
| Low-Level Input Voltage | VIL | 0.8 | V | VCC=3V to 3.6V | 7 | ||
| Input Voltage | VI | 0 | 5.5 | V | 7 | ||
| Output Voltage | VO | 0 | V | 7 | |||
| High-Level Output Current | IOH | -4 | mA | VCC=1.65V | 7 | ||
| High-Level Output Current | IOH | -8 | mA | VCC=2.3V | 7 | ||
| High-Level Output Current | IOH | -16 | mA | VCC=3V | 7 | ||
| High-Level Output Current | IOH | -24 | mA | VCC=3V | 7 | ||
| High-Level Output Current | IOH | -32 | mA | VCC=4.5V | 7 | ||
| Low-Level Output Current | IOL | 4 | mA | VCC=1.65V | 7 | ||
| Low-Level Output Current | IOL | 8 | mA | VCC=2.3V | 7 | ||
| Low-Level Output Current | IOL | 16 | mA | VCC=3V | 7 | ||
| Low-Level Output Current | IOL | 24 | mA | VCC=3V | 7 | ||
| Low-Level Output Current | IOL | 32 | mA | VCC=4.5V | 7 | ||
| Input Transition Rise or Fall Rate | Δt/Δv | 20 | ns/V | VCC=1.8V±0.15V, 2.5V±0.2V | 7 | ||
| Input Transition Rise or Fall Rate | Δt/Δv | 10 | ns/V | VCC=3.3V±0.3V | 7 | ||
| Operating Temperature | TA | -40 | 125 | °C | 7 | ||
| Supply voltage range | VCC | -0.5 | 6.5 | V | Over operating free-air temperature range | 6 | |
| Input voltage range | VI | -0.5 | 6.5 | V | 6 | ||
| Voltage range applied to any output in the high-impedance or power-off state | VO | -0.5 | 6.5 | V | High-impedance or power-off state | 6 | |
| Voltage range applied to any output in the high or low state | VO | -0.5 | V | High or low state | 6 | ||
| Input clamp current | IIK | -50 | mA | VI<0 | 6 | ||
| Output clamp current | IOK | -50 | mA | VO<0 | 6 | ||
| Continuous output current | IO | -50 | 50 | mA | 6 | ||
| Continuous current through VCC or GND | -100 | 100 | mA | 6 | |||
| Package thermal impedance (VSSOP8) | θJA | 205 | K/W | VSSOP8 package, JESD-51 | 6 | ||
| Junction temperature | TJ | -65 | 150 | °C | 6 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 6 | ||
| High-Level Output Voltage | VOH | 1.2 | V | IOH = -4mA; VCC=1.65V | 8 | ||
| High-Level Output Voltage | VOH | 1.9 | V | IOH = -8mA; VCC=2.3V | 8 | ||
| High-Level Output Voltage | VOH | 2.4 | V | IOH = -16mA; VCC=3V | 8 | ||
| High-Level Output Voltage | VOH | 2.3 | V | IOH = -24mA; VCC=3V | 8 | ||
| High-Level Output Voltage | VOH | 3.8 | V | IOH = -32mA; VCC=4.5V | 8 | ||
| Low-Level Output Voltage | VOL | 0.1 | V | IOL = 100μA; VCC=1.65V to 5.5V; Full temp | 8 | ||
| Low-Level Output Voltage | VOL | 0.45 | V | IOL = 4mA; VCC=1.65V | 8 | ||
| Low-Level Output Voltage | VOL | 0.3 | V | IOL = 8mA; VCC=2.3V | 8 | ||
| Low-Level Output Voltage | VOL | 0.4 | V | IOL = 16mA; VCC=3V | 8 | ||
| Low-Level Output Voltage | VOL | 0.55 | V | IOL = 24mA; VCC=3V | 8 | ||
| Input current (data or control inputs) | II | -1 | 1 | µA | VI=5.5V or GND; VCC 0V to 5.5V; +25°C | 8 | |
| Input current (data or control inputs) | II | -5 | 5 | µA | VI=5.5V or GND; VCC 0V to 5.5V; Full temp | 8 | |
| Power-off leakage current | Ioff | -1 | 1 | µA | VI or VO=5.5V; VCC=0; +25°C | 8 | |
| Power-off leakage current | Ioff | -10 | 10 | µA | VI or VO=5.5V; VCC=0; Full temp | 8 | |
| Quiescent supply current | ICC | 0.1 | 1 | µA | VI=5.5V or GND, IO=0; VCC 1.65V to 5.5V; +25°C | 8 | |
| Quiescent supply current | ICC | 10 | µA | VI=5.5V or GND, IO=0; VCC 1.65V to 5.5V; Full temp | 8 | ||
| Additional quiescent supply current | ΔICC | 500 | µA | One input at VCC-0.6V, other inputs at VCC or GND; VCC 3V to 5.5V; Full temp | 8 | ||
| Input capacitance | Ci | 5.5 | pF | VI = VCC or GND; VCC=3.3V; +25°C | 8 | ||
| Clock frequency | fclock | 100 | MHz | -40°C to 125°C; VCC=3.3V column | 9 | ||
| Clock frequency | fclock | 155 | MHz | -40°C to 125°C; VCC=5V column | 9 | ||
| Clock pulse width | tw | 3 | ns | CLK; -40°C to 125°C; VCC=3.3V column | 9 | ||
| Clock pulse width | tw | 2 | ns | CLK; -40°C to 125°C; VCC=5V column | 9 | ||
| Preset/clear low pulse width | tw | 3.4 | ns | PRE or CLR low; -40°C to 125°C; VCC=3.3V column | 9 | ||
| Preset/clear low pulse width | tw | 2 | ns | PRE or CLR low; -40°C to 125°C; VCC=5V column | 9 | ||
| Setup time, data before CLK | tsu | 3.2 | ns | Data; -40°C to 125°C; VCC=3.3V column | 9 | ||
| Setup time, data before CLK | tsu | 2 | ns | Data; -40°C to 125°C; VCC=5V column | 9 | ||
| Hold time | th | 0.5 | ns | -40°C to 125°C; VCC=3.3V column | 9 |
CAD (KiCad official)
- Symbol:
RS1G74XVS8 - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
rs1g74xvs8-etched.step/rs1g74xvs8-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rs1g74xvs8.step/rs1g74xvs8.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Jiangsu RUNIC Tech datasheet (19 pp, sha256
788e156472fe548f, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).