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SN74LVC841APWR
Public Made by Adomby adom
Texas Instruments Latches, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LVC841APWR
Texas Instruments · Latches · TSSOP-24
SN74LVC841APWR from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Buffered active-low output enable; when high it places all ten outputs in the high-impedance state, and it should be tied to VCC through a pullup resistor to keep the outputs high-Z during power up and power down. |
| 2 | 1D | input | Noninverting data input to latch 1, accepting up to 5.5 V so it can be driven from 3.3 V or 5 V devices. |
| 3 | 2D | input | Noninverting data input to latch 2, accepting up to 5.5 V so it can be driven from 3.3 V or 5 V devices. |
| 4 | 3D | input | Noninverting data input to latch 3, accepting up to 5.5 V so it can be driven from 3.3 V or 5 V devices. |
| 5 | 4D | input | Noninverting data input to latch 4, accepting up to 5.5 V so it can be driven from 3.3 V or 5 V devices. |
| 6 | 5D | input | Noninverting data input to latch 5, accepting up to 5.5 V so it can be driven from 3.3 V or 5 V devices. |
| 7 | 6D | input | Noninverting data input to latch 6, accepting up to 5.5 V so it can be driven from 3.3 V or 5 V devices. |
| 8 | 7D | input | Noninverting data input to latch 7, accepting up to 5.5 V so it can be driven from 3.3 V or 5 V devices. |
| 9 | 8D | input | Noninverting data input to latch 8, accepting up to 5.5 V so it can be driven from 3.3 V or 5 V devices. |
| 10 | 9D | input | Noninverting data input to latch 9, accepting up to 5.5 V so it can be driven from 3.3 V or 5 V devices. |
| 11 | 10D | input | Noninverting data input to latch 10, accepting up to 5.5 V so it can be driven from 3.3 V or 5 V devices. |
| 12 | GND | power_in | Ground reference for the device. |
| 13 | LE | input | Latch enable: when high the latches are transparent so Q follows D; when low the latches hold the last data (LE falling edge sets the setup and hold timing references). |
| 14 | 10Q | tri_state | Noninverting 3-state output of latch 10, rated IOH -24 mA and IOL 24 mA at VCC = 3 V, and high-impedance when OE is high. |
| 15 | 9Q | tri_state | Noninverting 3-state output of latch 9, rated IOH -24 mA and IOL 24 mA at VCC = 3 V, and high-impedance when OE is high. |
| 16 | 8Q | tri_state | Noninverting 3-state output of latch 8, rated IOH -24 mA and IOL 24 mA at VCC = 3 V, and high-impedance when OE is high. |
| 17 | 7Q | tri_state | Noninverting 3-state output of latch 7, rated IOH -24 mA and IOL 24 mA at VCC = 3 V, and high-impedance when OE is high. |
| 18 | 6Q | tri_state | Noninverting 3-state output of latch 6, rated IOH -24 mA and IOL 24 mA at VCC = 3 V, and high-impedance when OE is high. |
| 19 | 5Q | tri_state | Noninverting 3-state output of latch 5, rated IOH -24 mA and IOL 24 mA at VCC = 3 V, and high-impedance when OE is high. |
| 20 | 4Q | tri_state | Noninverting 3-state output of latch 4, rated IOH -24 mA and IOL 24 mA at VCC = 3 V, and high-impedance when OE is high. |
| 21 | 3Q | tri_state | Noninverting 3-state output of latch 3, rated IOH -24 mA and IOL 24 mA at VCC = 3 V, and high-impedance when OE is high. |
| 22 | 2Q | tri_state | Noninverting 3-state output of latch 2, rated IOH -24 mA and IOL 24 mA at VCC = 3 V, and high-impedance when OE is high. |
| 23 | 1Q | tri_state | Noninverting 3-state output of latch 1, rated IOH -24 mA and IOL 24 mA at VCC = 3 V, and high-impedance when OE is high. |
| 24 | VCC | power_in | Supply voltage, 1.65 V to 3.6 V operating (data retention down to 1.5 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-24 |
| Category | Logic |
| Pins | 24 |
CAD (KiCad official)
- Symbol:
SN74LVC841APWR - Footprint:
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm - 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files:
sn74lvc841apwr-etched.step/sn74lvc841apwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lvc841apwr.step/sn74lvc841apwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (18 pp, sha256
65bbaf5fefc827e4, retrieved 2026-10-08, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).