component
RT8292BHZSP
Public Made by Adomby adom
Richtek Tech DC-DC Converters, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownRT8292BHZSP
Richtek Tech · DC-DC Converters · SOP-8-EP
RT8292BHZSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | power_out | Bootstrap for the high-side gate driver; connect a 0.1µF or greater ceramic capacitor from BOOT to SW. |
| 2 | VIN | power_in | Input supply voltage of 4.5V to 23V; it must be bypassed with a suitably large ceramic capacitor. |
| 3 | SW | output | Switch node that connects to the external L-C filter. |
| 4 | GND | power_in | Ground; the exposed pad (pin 9) must be soldered to a large PCB and connected to GND for maximum power dissipation. |
| 5 | FB | input | Feedback input connected to the converter output, setting the regulated voltage through an internal or external resistive divider with a 0.8V typical reference. |
| 6 | COMP | passive | Compensation node for the control loop; connect a series RC network from COMP to GND, with an additional capacitor in some cases. |
| 7 | EN | input | Active-high chip enable; a logic low below 0.4V forces shutdown with supply current under 3µA, and it can be pulled up to VIN through a 100k resistor for automatic startup. |
| 8 | SS | passive | Soft-start control input; a capacitor from SS to GND sets the soft-start period, with 0.1µF giving 13.5ms. |
| 9 | GND | power_in | Exposed thermal pad that is the ground connection and must be soldered to a large PCB copper area for maximum power dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | SOP-8-EP |
| Category | Power Management ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Shutdown Supply Current | 0.5 | 3 | A | VEN = 0V | 4 | ||
| Supply Current | 0.8 | 1.2 | mA | VEN = 3V, VFB = 0.9V | 4 | ||
| Feedback Voltage | VFB | 0.788 | 0.8 | 0.812 | V | 4.5V VIN 23V | 4 |
| Oscillation Frequency | fOSC1 | 1 | 1.2 | 1.4 | MHz | 4 | |
| High Side Switch Leakage Current | 0 | 10 | A | VEN = 0V, VSW = 0V | 4 | ||
| EN Input Threshold Logic-High Voltage | VIH | 2.7 | 5.5 | V | 5 | ||
| EN Input Threshold Logic-Low Voltage | VIL | 0.4 | V | 5 | |||
| Input Under Voltage Lockout Threshold | VUVLO | 3.8 | 4.2 | 4.5 | V | VIN Rising | 5 |
| Supply Voltage VIN (absolute maximum) | VIN | -0.3 | 25 | V | 4 | ||
| Input Voltage SW | VSW | -0.3 | V | Upper limit printed as VIN + 0.3V | 4 | ||
| VBOOT - VSW | VBOOT-VSW | -0.3 | 6 | V | 4 | ||
| Other Pin Voltages | -0.3 | 6 | V | 4 | |||
| Power Dissipation SOP-8 (Exposed Pad) | PD | 1.333 | W | TA = 25°C | 4 | ||
| Package Thermal Resistance SOP-8 (Exposed Pad) junction-to-ambient | θJA | 75 | °C/W | 4 | |||
| Package Thermal Resistance SOP-8 (Exposed Pad) junction-to-case | θJC | 15 | °C/W | 4 | |||
| Lead Temperature (Soldering) | 260 | °C | Soldering, 10 sec. | 4 | |||
| Junction Temperature | TJ | 150 | °C | 4 | |||
| Storage Temperature Range | -65 | 150 | °C | 4 | |||
| ESD Susceptibility HBM | 2 | kV | Human Body Mode | 4 | |||
| ESD Susceptibility MM | 200 | V | Machine Mode | 4 | |||
| Supply Voltage VIN (recommended) | VIN | 4.5 | 23 | V | 4 | ||
| Junction Temperature Range | TJ | -40 | 125 | °C | 4 | ||
| Ambient Temperature Range | TA | -40 | 85 | °C | 4 |
CAD (KiCad official)
- Symbol:
RT8292BHZSP - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
rt8292bhzsp-etched.step/rt8292bhzsp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt8292bhzsp.step/rt8292bhzsp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (14 pp, sha256
a4101541aa1eef62, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).