component
LDK220M30R
Public Made by Adomby adom
STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLDK220M30R
STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5L
LDK220M30R from STMicroelectronics, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input voltage of the LDO with operating voltage range 2.5 to 13.2 V |
| 2 | GND | power_in | Common ground |
| 3 | EN | input | Enable pin logic input; low = shutdown, high = active; EN cannot be left floating |
| 4 | ADJ/NC | unconnected | Not connected on fixed version |
| 5 | OUT | power_out | Output voltage of the LDO, fixed at 3.0 V |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOT-23-5L |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating input voltage | VIN | 2.5 | 13.2 | V | 6 | ||
| VOUT accuracy | VOUT | -2 | 2 | % | IOUT = 1 mA, TJ = 25 °C | 6 | |
| VOUT accuracy | VOUT | -3 | 3 | % | IOUT = 1 mA, -40 °C < TJ < 125 °C | 6 | |
| Static line regulation | ΔVOUT | 0.001 | 0.05 | %/V | VOUT + 1 V ≤ VIN ≤ 13.2 V, IOUT = 1 mA | 6 | |
| Static load regulation | ΔVOUT | 0.001 | 0.003 | %/mA | IOUT = 1 mA to 200 mA | 6 | |
| Dropout voltage | VDROP | 200 | 350 | mV | IOUT = 200 mA, VOUT = 3.3 V, 40 °C < TJ < 125 °C | 6 | |
| Quiescent current | IQ | 55 | 90 | µA | VIN = VOUT +1 V, IOUT = 0 mA, -40 °C < TJ < 125 °C | 6 | |
| Quiescent current | IQ | 60 | 100 | µA | VOUT +1 V ≤ VIN ≤ 13.2 V, IOUT = 200 mA, -40 °C < TJ < 125 °C | 6 | |
| VIN input current in off mode | VIN | 0.1 | 1 | µA | VEN = GND, TJ = 25 °C | 6 | |
| Enable input logic low | VEN | 0.4 | V | VIN = 2.5 V to 13.2 V, -40 °C < TJ < 125 °C | 6 | ||
| Enable input logic high | VEN | 1.2 | V | VIN = 2.5 V to 13.2 V, -40 °C < TJ < 125 °C | 6 | ||
| Enable pin input current | IEN | 0.1 | 100 | nA | VEN = VIN | 6 | |
| Output capacitor (external COUT capacitance range) | COUT | 1 | 22 | µF | See Section 6 Typical characteristics | 6 | |
| DC input voltage | VIN | -0.3 | 14 | V | 5 | ||
| DC output voltage | VOUT | -0.3 | V | Max printed as VI + 0.3 V; values referred to GND | 5 | ||
| Enable input voltage | VEN | -0.3 | V | Max printed as VI + 0.3 V; values referred to GND | 5 | ||
| Power dissipation | PD | 500 | mW | Calculate with package thermal performance | 5 | ||
| Storage temperature range | TSTG | -65 | 150 | °C | 5 | ||
| Operating junction temperature range | TOP | -40 | 125 | °C | 5 | ||
| Thermal resistance junction-ambient (SOT23-5L) | RthJA | 160 | °C/W | JESD 51, 4 layers 2S2P | 5 | ||
| Thermal resistance junction-case (SOT23-5L) | RthJC | 68 | °C/W | JESD 51, 4 layers 2S2P | 5 |
CAD (KiCad official)
- Symbol:
LDK220M30R - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5L (KiCad packages3D, STEP)
- 3D model files:
ldk220m30r-etched.step/ldk220m30r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ldk220m30r.step/ldk220m30r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (32 pp, sha256
04502367190ecc99, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).