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DMPH4015SSSQ-13
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDMPH4015SSSQ-13
Diodes Incorporated · MOSFETs · SOIC-8
DMPH4015SSSQ-13 from Diodes Incorporated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET, connected internally to the body diode anode; VDSS is -40V. |
| 2 | S | passive | Source of the P-channel MOSFET, tied in parallel with the other source pins to carry the continuous drain current of up to -11.4A. |
| 3 | S | passive | Source of the P-channel MOSFET, tied in parallel with the other source pins. |
| 4 | G | input | Gate of the P-channel MOSFET with a gate-source rating of ±25V and a threshold of -1.5V to -2.5V. |
| 5 | D | passive | Drain of the P-channel MOSFET, rated for -40V drain-source and pulsed drain current up to -85A. |
| 6 | D | passive | Drain of the P-channel MOSFET, tied in parallel with the other drain pins. |
| 7 | D | passive | Drain of the P-channel MOSFET, tied in parallel with the other drain pins. |
| 8 | D | passive | Drain of the P-channel MOSFET, tied in parallel with the other drain pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOIC-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | -40 | V | TA = +25°C | 2 | ||
| Gate-Source Voltage | VGSS | -25 | 25 | V | TA = +25°C | 2 | |
| Continuous Drain Current | ID | -11.4 | A | VGS = -10V, steady state, TA = +25°C | 2 | ||
| Continuous Drain Current | ID | -8.1 | A | VGS = -10V, steady state, TA = +100°C | 2 | ||
| Pulsed Drain Current | IDM | -85 | A | 10μs Pulse, Duty Cycle = 1% | 2 | ||
| Maximum Body Diode Continuous Current | IS | -3 | A | Note 7 | 2 | ||
| Avalanche Current | IAS | -22 | A | L = 1mH | 2 | ||
| Avalanche Energy | EAS | 260 | mJ | L = 1mH | 2 | ||
| Total Power Dissipation | PD | 1.4 | W | Note 6 | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 90 | °C/W | Note 6 | 2 | ||
| Total Power Dissipation | PD | 1.8 | W | Note 7 | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 70 | °C/W | Note 7 | 2 | ||
| Thermal Resistance, Junction to Case | RθJC | 7 | °C/W | Note 7 | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 175 | °C | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | -40 | V | VGS = 0V, ID = -250μA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -1 | μA | VDS = -40V, VGS = 0V | 2 | ||
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VGS = ±25V, VDS = 0V | 2 | |
| Gate Threshold Voltage | VGS(TH) | -1.5 | -2.5 | V | VDS = VGS, ID = -250μA | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 9 | 11 | mΩ | VGS = -10V, ID = -9.8A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 11 | 15 | mΩ | VGS = -4.5V, ID = -9.8A | 2 | |
| Diode Forward Voltage | VSD | -0.7 | -1 | V | VGS = 0V, IS = -1A | 2 | |
| Forward Transfer Admittance | /Yfs/ | 26 | S | VDS = -20V, ID = -9.8A | 2 | ||
| Input Capacitance | Ciss | 4234 | pF | VDS = -20V, VGS = 0V, f = 1MHz | 2 | ||
| Output Capacitance | Coss | 1036 | pF | VDS = -20V, VGS = 0V, f = 1MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 526 | pF | VDS = -20V, VGS = 0V, f = 1MHz | 2 | ||
| Gate Resistance | RG | 7.8 | Ω | VDS = 0V, VGS = 0V, f = 1MHz | 2 | ||
| Total Gate Charge (VGS = -4.5V) | Qg | 42.7 | nC | VDS = -20V, ID = -9.8A | 2 | ||
| Total Gate Charge (VGS = -10V) | Qg | 91 | nC | VDS = -20V, ID = -9.8A | 2 | ||
| Gate-Source Charge | Qgs | 14.2 | nC | VDS = -20V, ID = -9.8A | 2 | ||
| Gate-Drain Charge | Qgd | 13.5 | nC | VDS = -20V, ID = -9.8A | 2 | ||
| Turn-On Delay Time | tD(ON) | 13.2 | ns | VGS = -10V, VDD = -20V, RG = 6Ω, ID = -1A, RL = 20Ω | 2 | ||
| Turn-On Rise Time | tR | 10 | ns | VGS = -10V, VDD = -20V, RG = 6Ω, ID = -1A, RL = 20Ω | 2 | ||
| Turn-Off Delay Time | tD(OFF) | 303 | ns | VGS = -10V, VDD = -20V, RG = 6Ω, ID = -1A, RL = 20Ω | 2 | ||
| Turn-Off Fall Time | tF | 138 | ns | VGS = -10V, VDD = -20V, RG = 6Ω, ID = -1A, RL = 20Ω | 2 | ||
| Reverse Recovery Time | tRR | 26 | ns | IF = -9.8A, di/dt = -100A/μs | 2 | ||
| Reverse Recovery Charge | QRR | 20 | nC | IF = -9.8A, di/dt = -100A/μs | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | tin | x Terminal Connections: See Diagram x Terminals: Finish, Matte Tin Annealed over Copper Leadframe. | 1 |
CAD (land: KiCad; 3D: generated from the datasheet)
- Symbol:
DMPH4015SSSQ-13 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8, generated on the KiCad land (body 3.85 x 4.9 mm, terminals on the pads, 1.45 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
- 3D model files:
dmph4015sssq-13-etched.step/dmph4015sssq-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmph4015sssq-13.step/dmph4015sssq-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (7 pp, sha256
d21293f6e1fcc2cd, retrieved 2026-11-13, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).