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DS6521AFD33
Public Made by Adomby adom
DSTECH Battery Management, DFN-10L(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDS6521AFD33
DSTECH · Battery Management · DFN-10L(3x3)
DS6521AFD33 from DSTECH, in a DFN-10L(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TS | input | Connects to the battery-pack NTC thermistor (10K or 100K at 25°C) against RTS pulled up to VIN; tying TS directly to GND disables temperature sensing. |
| 2 | ISET | passive | Programs the fast-charge current: an external resistor from ISET to GND sets ICHG (ICHG = VISET/RISET × 1000, with VISET = 1 V; charge current range 50 mA to 1 A). |
| 3 | GND | power_in | Ground reference for the charger. |
| 4 | VIN | power_in | Input supply; the datasheet recommends 4.5 V to 24 V, with input overvoltage protection at 6.0 V (rising). |
| 5 | VCC | power_out | Internal 5 V regulator output; a 0.1 µF to 1 µF capacitor to ground is recommended. |
| 6 | IMIN | passive | Programs the charge termination current: an external resistor from IMIN to GND sets ITERM (5 mA to 100 mA range, ITERM = KT/RIMIN with KT = 605); when floating, ITERM = 1/10 of ICHG. |
| 7 | BAT | power_out | Connects to the battery (may also connect the system load); a bypass capacitor of 10 µF to 22 µF is recommended. |
| 8 | TEM | output | Open-drain termination indicator: low (FET on) when charge current is below the termination current ITEM, open when it is above. |
| 9 | CHG | output | Open-drain charge status output: low (FET on) while charging, open when not charging, in OVP or UVLO, or when charging is complete. |
| 10 | EN | input | Chip enable input; the datasheet gives a rising threshold VIH of 1.5 V and a falling threshold VIL of 0.4 V. |
| 11 | PGND | power_in | Exposed pad, the chip substrate; leave floating or connect directly to ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DSTECH |
| Package | DFN-10L(3x3) |
| Category | Power Management (PMIC) |
| Pins | 11 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 输入电压 | VIN | 4.5 | 24 | V | 5 | ||
| 输入电压 VIN | VIN | 4.5 | 24 | V | 4 | ||
| 应用结温范围 | -40 | 125 | °C | 4 | |||
| 应用环温范围 | -40 | 85 | °C | 4 | |||
| VIN/EN/CHG/TEM 对 GND | -0.3 | 28 | V | 4 | |||
| BAT 对 GND | -0.3 | 15 | V | 4 | |||
| 其他端子对 GND | -0.3 | 6 | V | 4 | |||
| 引脚焊锡温度 | 260 | °C | Soldering, 10 sec. | 4 | |||
| 结点温度 | 150 | °C | 4 | ||||
| 存储温度范围 | -60 | 150 | °C | 4 | |||
| ESD HBM | 2 | KV | 4 | ||||
| ESD MM | 200 | V | 4 | ||||
| DFN3x3-10L 封装热阻 | θJA | 70 | °C/W | TA = 25°C, DSTECH EVB board (Note 2) | 4 | ||
| UVLO 阈值电压 / 过压保护 | VOVP | 6 | V | VIN Rising | 5 | ||
| 输入过压保护迟滞电压 | VOVP_HYS | 0.2 | V | 5 | |||
| 输入电源电流（充电模式） | IQA | 350 | μA | EN = High, VIN = 5V, no load on OUT terminal | 5 | ||
| 输入待机电流 | IQS | 80 | μA | EN = 0V, VIN = 5V | 5 | ||
| 反接电池电流 BAT 端子流入电流 | IRBAT | 800 | μA | VBAT = -4.2V | 5 | ||
| 使能输入电流 | IEN | 10 | 100 | nA | VEN = 5V | 5 | |
| 使能阈值电压 高电平 | VIH | 1.5 | V | EN Rising | 5 | ||
| 使能阈值电压 低电平 | VIL | 0.4 | V | EN Falling | 5 | ||
| 电池输出电压 Type A | VBAT | 4.16 | 4.2 | 4.24 | V | ICHG = 25mA | 5 |
| 再充电电池电压 Type A | VBAT | 4 | V | CHG Low to Open | 5 | ||
| 快速充电电流 | ICHG | 50 | 1000 | mA | RISET = KΩ | 5 | |
| 快速充电电流精度 (ICHG > 100mA) | ICHG | -10 | 10 | % | ICHG > 100mA | 5 | |
| 快速充电电流精度 (ICHG < 100mA) | ICHG | -10 | 10 | mA | ICHG < 100mA | 5 | |
| 预充电流 | IPRE | 10 | % | Percentage of ICHG | 5 | ||
| 截止充电电流 | IMIN | 5 | 100 | mA | RIMIN = KΩ | 5 | |
| 截止电流延迟时间 | TTEM | 16.7 | mS | IMIN to CHG | 5 | ||
| 温度调节阈值限制 | TJ(REG) | 125 | °C | 5 | |||
| 热关断温度 | TJ_OFF | 155 | °C | 5 |
CAD (KiCad official)
- Symbol:
DS6521AFD33 - Footprint:
Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm - 3D model: DFN-10L(3x3) (KiCad packages3D, STEP)
- 3D model files:
ds6521afd33-etched.step/ds6521afd33-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds6521afd33.step/ds6521afd33.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: DSTECH datasheet (15 pp, sha256
e4ba68fabe077547, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).