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Contents

README

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SI4800BDY-T1-GE3

Vishay Intertech · MOSFETs · SO-8

SI4800BDY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the N-channel MOSFET, with continuous diode source current rated at 2.3 A.
2 S passive Source of the N-channel MOSFET, with continuous diode source current rated at 2.3 A.
3 S passive Source of the N-channel MOSFET, with continuous diode source current rated at 2.3 A.
4 G input Gate of the N-channel MOSFET, with a maximum gate-source voltage of ±25 V.
5 D passive Drain of the N-channel MOSFET, with a maximum drain-source voltage of 30 V and 9 A continuous drain current at TA = 25 °C (10 s).
6 D passive Drain of the N-channel MOSFET, with a maximum drain-source voltage of 30 V and 9 A continuous drain current at TA = 25 °C (10 s).
7 D passive Drain of the N-channel MOSFET, with a maximum drain-source voltage of 30 V and 9 A continuous drain current at TA = 25 °C (10 s).
8 D passive Drain of the N-channel MOSFET, with a maximum drain-source voltage of 30 V and 9 A continuous drain current at TA = 25 °C (10 s).

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SO-8
Category Transistors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Gate Threshold Voltage VGS(th) 0.8 1.8 V VDS = VGS, ID = 250 µA 2
Gate-Body Leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 30 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 5 µA VDS = 30 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current ID(on) 30 A VDS ≥ 5 V, VGS = 10 V 2
Drain-Source On-State Resistance RDS(on) 0.0155 0.0185 Ω VGS = 10 V, ID = 9 A 2
Drain-Source On-State Resistance RDS(on) 0.023 0.03 Ω VGS = 4.5 V, ID = 7 A 2
Forward Transconductance gfs 16 S VDS = 15 V, ID = 9 A 2
Diode Forward Voltage VSD 0.75 1.2 V IS = 2.3 A, VGS = 0 V 2
Total Gate Charge Qg 8.7 13 nC VDS = 15 V, VGS = 5.0 V, ID = 9 A 2
Gate-Source Charge Qgs 1.5 nC VDS = 15 V, VGS = 5.0 V, ID = 9 A 2
Gate-Drain Charge Qgd 3.5 nC VDS = 15 V, VGS = 5.0 V, ID = 9 A 2
Gate Resistance Rg 0.5 1.4 2.2 Ω 2
Turn-On Delay Time td(on) 7 15 ns VDD = 15 V, RL = 15 Ω, ID ≅ 1 A, VGEN = 10 V, Rg = 6 Ω 2
Rise Time tr 12 20 ns VDD = 15 V, RL = 15 Ω, ID ≅ 1 A, VGEN = 10 V, Rg = 6 Ω 2
Turn-Off Delay Time td(off) 32 50 ns VDD = 15 V, RL = 15 Ω, ID ≅ 1 A, VGEN = 10 V, Rg = 6 Ω 2
Fall Time tf 14 25 ns VDD = 15 V, RL = 15 Ω, ID ≅ 1 A, VGEN = 10 V, Rg = 6 Ω 2
Source-Drain Reverse Recovery Time trr 30 60 ns IF = 2.3 A, dI/dt = 100 A/µs 2
Drain-Source Voltage VDS 30 V TA = 25 °C 1
Gate-Source Voltage VGS -25 25 V TA = 25 °C 1
Continuous Drain Current, 10 s ID 9 A TJ = 150 °C, TA = 25 °C, t ≤ 10 s 1
Continuous Drain Current, Steady State ID 6.5 A TJ = 150 °C, TA = 25 °C 1
Continuous Drain Current, 10 s ID 7 A TJ = 150 °C, TA = 70 °C, t ≤ 10 s 1
Continuous Drain Current, Steady State ID 5 A TJ = 150 °C, TA = 70 °C 1
Pulsed Drain Current IDM 40 A 10 µs Pulse Width 1
Continuous Source Current (Diode Conduction) IS 2.3 A 1
Avalanche Current IAS 15 A L = 0.1 mH 1
Single-Pulse Avalanche Energy EAS 11.25 mJ L = 0.1 mH 1
Maximum Power Dissipation, 10 s PD 2.5 W TA = 25 °C, t ≤ 10 s 1
Maximum Power Dissipation, Steady State PD 1.3 W TA = 25 °C 1
Maximum Power Dissipation, 10 s PD 1.6 W TA = 70 °C, t ≤ 10 s 1
Maximum Power Dissipation, Steady State PD 0.8 W TA = 70 °C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Junction-to-Ambient Thermal Resistance, t ≤ 10 s RthJA 40 50 °C/W t ≤ 10 s, surface mounted on FR4 board 1
Junction-to-Ambient Thermal Resistance, Steady State RthJA 70 95 °C/W Steady State, surface mounted on FR4 board 1
Junction-to-Foot (Drain) Thermal Resistance RthJF 24 30 °C/W Steady State 1

CAD (KiCad official)

  • Symbol: SI4800BDY-T1-GE3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: si4800bdy-t1-ge3-etched.step / si4800bdy-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4800bdy-t1-ge3.step / si4800bdy-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (6 pp, sha256 d5f9e6a5ee69f743, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF